size; /* Number 512-byte blocks allocated. */ unsigned long long st_blocks; unsigned long st_atime; unsigned long st_atime_nsec; unsigned long st_mtime; unsigned int st_mtime_nsec; unsigned long st_ctime; unsigned long st_ctime_nsec; unsigned long long st_ino; }; #else /* __i386__ */ struct stat { unsigned long st_dev; unsigned long st_ino; unsigned long st_nlink; unsigned int st_mode; unsigned int st_uid; unsigned int st_gid; unsigned int __pad0; unsigned long st_rdev; long st_size; long st_blksize; long st_blocks; /* Number 512-byte blocks allocated. */ unsigned long st_atime; unsigned long st_atime_nsec; unsigned long st_mtime; unsigned long st_mtime_nsec; unsigned long st_ctime; unsigned long st_ctime_nsec; long __unused[3]; }; #endif /* for 32bit emulation and 32 bit kernels */ struct __old_kernel_stat { unsigned short st_dev; unsigned short st_ino; unsigned short st_mode; unsigned short st_nlink; unsigned short st_uid; unsigned short st_gid; unsigned short st_rdev; #ifdef __i386__ unsigned long st_size; unsigned long st_atime; unsigned long st_mtime; unsigned long st_ctime; #else unsigned int st_size; unsigned int st_atime; unsigned int st_mtime; unsigned int st_ctime; #endif }; #endif /* _ASM_X86_STAT_H */ #include /* * ldt.h * * Definitions of structures used with the modify_ldt system call. */ #ifndef _ASM_X86_LDT_H #define _ASM_X86_LDT_H /* Maximum number of LDT entries supported. */ #define LDT_ENTRIES 8192 /* The size of each LDT entry. */ #define LDT_ENTRY_SIZE 8 #ifndef __ASSEMBLY__ /* * Note on 64bit base and limit is ignored and you cannot set DS/ES/CS * not to the default values if you still want to do syscalls. This * call is more for 32bit mode therefore. */ struct user_desc { unsigned int entry_number; unsigned int base_addr; unsigned int limit; unsigned int seg_32bit:1; unsigned int contents:2; unsigned int read_exec_only:1; unsigned int limit_in_pages:1; unsigned int seg_not_present:1; unsigned int useable:1; #ifdef __x86_64__ unsigned int lm:1; #endif }; #define MODIFY_LDT_CONTENTS_DATA 0 #define MODIFY_LDT_CONTENTS_STACK 1 #define MODIFY_LDT_CONTENTS_CODE 2 #endif /* !__ASSEMBLY__ */ #endif /* _ASM_X86_LDT_H */ # ifdef __i386__ # include "unistd_32.h" # else # include "unistd_64.h" # endif #ifndef _ASM_X86_STATFS_H #define _ASM_X86_STATFS_H /* * We need compat_statfs64 to be packed, because the i386 ABI won't * add padding at the end to bring it to a multiple of 8 bytes, but * the x86_64 ABI will. */ #define ARCH_PACK_COMPAT_STATFS64 __attribute__((packed,aligned(4))) #include #endif /* _ASM_X86_STATFS_H */ #include #ifndef _ASM_X86_POSIX_TYPES_64_H #define _ASM_X86_POSIX_TYPES_64_H /* * This file is generally used by user-level software, so you need to * be a little careful about namespace pollution etc. Also, we cannot * assume GCC is being used. */ typedef unsigned long __kernel_ino_t; typedef unsigned int __kernel_mode_t; typedef unsigned long __kernel_nlink_t; typedef long __kernel_off_t; typedef int __kernel_pid_t; typedef int __kernel_ipc_pid_t; typedef unsigned int __kernel_uid_t; typedef unsigned int __kernel_gid_t; typedef unsigned long __kernel_size_t; typedef long __kernel_ssize_t; typedef long __kernel_ptrdiff_t; typedef long __kernel_time_t; typedef long __kernel_suseconds_t; typedef long __kernel_clock_t; typedef int __kernel_timer_t; typedef int __kernel_clockid_t; typedef int __kernel_daddr_t; typedef char * __kernel_caddr_t; typedef unsigned short __kernel_uid16_t; typedef unsigned short __kernel_gid16_t; #ifdef __GNUC__ typedef long long __kernel_loff_t; #endif typedef struct { int val[2]; } __kernel_fsid_t; typedef unsigned short __kernel_old_uid_t; typedef unsigned short __kernel_old_gid_t; typedef __kernel_uid_t __kernel_uid32_t; typedef __kernel_gid_t __kernel_gid32_t; typedef unsigned long __kernel_old_dev_t; #endif /* _ASM_X86_POSIX_TYPES_64_H */ #ifndef _ASM_X86_UNISTD_32_H #define _ASM_X86_UNISTD_32_H /* * This file contains the system call numbers. */ #define __NR_restart_syscall 0 #define __NR_exit 1 #define __NR_fork 2 #define __NR_read 3 #define __NR_write 4 #define __NR_open 5 #define __NR_close 6 #define __NR_waitpid 7 #define __NR_creat 8 #define __NR_link 9 #define __NR_unlink 10 #define __NR_execve 11 #define __NR_chdir 12 #define __NR_time 13 #define __NR_mknod 14 #define __NR_chmod 15 #define __NR_lchown 16 #define __NR_break 17 #define __NR_oldstat 18 #define __NR_lseek 19 #define __NR_getpid 20 #define __NR_mount 21 #define __NR_umount 22 #define __NR_setuid 23 #define __NR_getuid 24 #define __NR_stime 25 #define __NR_ptrace 26 #define __NR_alarm 27 #define __NR_oldfstat 28 #define __NR_pause 29 #define __NR_utime 30 #define __NR_stty 31 #define __NR_gtty 32 #define __NR_access 33 #define __NR_nice 34 #define __NR_ftime 35 #define __NR_sync 36 #define __NR_kill 37 #define __NR_rename 38 #define __NR_mkdir 39 #define __NR_rmdir 40 #define __NR_dup 41 #define __NR_pipe 42 #define __NR_times 43 #define __NR_prof 44 #define __NR_brk 45 #define __NR_setgid 46 #define __NR_getgid 47 #define __NR_signal 48 #define __NR_geteuid 49 #define __NR_getegid 50 #define __NR_acct 51 #define __NR_umount2 52 #define __NR_lock 53 #define __NR_ioctl 54 #define __NR_fcntl 55 #define __NR_mpx 56 #define __NR_setpgid 57 #define __NR_ulimit 58 #define __NR_oldolduname 59 #define __NR_umask 60 #define __NR_chroot 61 #define __NR_ustat 62 #define __NR_dup2 63 #define __NR_getppid 64 #define __NR_getpgrp 65 #define __NR_setsid 66 #define __NR_sigaction 67 #define __NR_sgetmask 68 #define __NR_ssetmask 69 #define __NR_setreuid 70 #define __NR_setregid 71 #define __NR_sigsuspend 72 #define __NR_sigpending 73 #define __NR_sethostname 74 #define __NR_setrlimit 75 #define __NR_getrlimit 76 /* Back compatible 2Gig limited rlimit */ #define __NR_getrusage 77 #define __NR_gettimeofday 78 #define __NR_settimeofday 79 #define __NR_getgroups 80 #define __NR_setgroups 81 #define __NR_select 82 #define __NR_symlink 83 #define __NR_oldlstat 84 #define __NR_readlink 85 #define __NR_uselib 86 #define __NR_swapon 87 #define __NR_reboot 88 #define __NR_readdir 89 #define __NR_mmap 90 #define __NR_munmap 91 #define __NR_truncate 92 #define __NR_ftruncate 93 #define __NR_fchmod 94 #define __NR_fchown 95 #define __NR_getpriority 96 #define __NR_setpriority 97 #define __NR_profil 98 #define __NR_statfs 99 #define __NR_fstatfs 100 #define __NR_ioperm 101 #define __NR_socketcall 102 #define __NR_syslog 103 #define __NR_setitimer 104 #define __NR_getitimer 105 #define __NR_stat 106 #define __NR_lstat 107 #define __NR_fstat 108 #define __NR_olduname 109 #define __NR_iopl 110 #define __NR_vhangup 111 #define __NR_idle 112 #define __NR_vm86old 113 #define __NR_wait4 114 #define __NR_swapoff 115 #define __NR_sysinfo 116 #define __NR_ipc 117 #define __NR_fsync 118 #define __NR_sigreturn 119 #define __NR_clone 120 #define __NR_setdomainname 121 #define __NR_uname 122 #define __NR_modify_ldt 123 #define __NR_adjtimex 124 #define __NR_mprotect 125 #define __NR_sigprocmask 126 #define __NR_create_module 127 #define __NR_init_module 128 #define __NR_delete_module 129 #define __NR_get_kernel_syms 130 #define __NR_quotactl 131 #define __NR_getpgid 132 #define __NR_fchdir 133 #define __NR_bdflush 134 #define __NR_sysfs 135 #define __NR_personality 136 #define __NR_afs_syscall 137 /* Syscall for Andrew File System */ #define __NR_setfsuid 138 #define __NR_setfsgid 139 #define __NR__llseek 140 #define __NR_getdents 141 #define __NR__newselect 142 #define __NR_flock 143 #define __NR_msync 144 #define __NR_readv 145 #define __NR_writev 146 #define __NR_getsid 147 #define __NR_fdatasync 148 #define __NR__sysctl 149 #define __NR_mlock 150 #define __NR_munlock 151 #define __NR_mlockall 152 #define __NR_munlockall 153 #define __NR_sched_setparam 154 #define __NR_sched_getparam 155 #define __NR_sched_setscheduler 156 #define __NR_sched_getscheduler 157 #define __NR_sched_yield 158 #define __NR_sched_get_priority_max 159 #define __NR_sched_get_priority_min 160 #define __NR_sched_rr_get_interval 161 #define __NR_nanosleep 162 #define __NR_mremap 163 #define __NR_setresuid 164 #define __NR_getresuid 165 #define __NR_vm86 166 #define __NR_query_module 167 #define __NR_poll 168 #define __NR_nfsservctl 169 #define __NR_setresgid 170 #define __NR_getresgid 171 #define __NR_prctl 172 #define __NR_rt_sigreturn 173 #define __NR_rt_sigaction 174 #define __NR_rt_sigprocmask 175 #define __NR_rt_sigpending 176 #define __NR_rt_sigtimedwait 177 #define __NR_rt_sigqueueinfo 178 #define __NR_rt_sigsuspend 179 #define __NR_pread64 180 #define __NR_pwrite64 181 #define __NR_chown 182 #define __NR_getcwd 183 #define __NR_capget 184 #define __NR_capset 185 #define __NR_sigaltstack 186 #define __NR_sendfile 187 #define __NR_getpmsg 188 /* some people actually want streams */ #define __NR_putpmsg 189 /* some people actually want streams */ #define __NR_vfork 190 #define __NR_ugetrlimit 191 /* SuS compliant getrlimit */ #define __NR_mmap2 192 #define __NR_truncate64 193 #define __NR_ftruncate64 194 #define __NR_stat64 195 #define __NR_lstat64 196 #define __NR_fstat64 197 #define __NR_lchown32 198 #define __NR_getuid32 199 #define __NR_getgid32 200 #define __NR_geteuid32 201 #define __NR_getegid32 202 #define __NR_setreuid32 203 #define __NR_setregid32 204 #define __NR_getgroups32 205 #define __NR_setgroups32 206 #define __NR_fchown32 207 #define __NR_setresuid32 208 #define __NR_getresuid32 209 #define __NR_setresgid32 210 #define __NR_getresgid32 211 #define __NR_chown32 212 #define __NR_setuid32 213 #define __NR_setgid32 214 #define __NR_setfsuid32 215 #define __NR_setfsgid32 216 #define __NR_pivot_root 217 #define __NR_mincore 218 #define __NR_madvise 219 #define __NR_madvise1 219 /* delete when C lib stub is removed */ #define __NR_getdents64 220 #define __NR_fcntl64 221 /* 223 is unused */ #define __NR_gettid 224 #define __NR_readahead 225 #define __NR_setxattr 226 #define __NR_lsetxattr 227 #define __NR_fsetxattr 228 #define __NR_getxattr 229 #define __NR_lgetxattr 230 #define __NR_fgetxattr 231 #define __NR_listxattr 232 #define __NR_llistxattr 233 #define __NR_flistxattr 234 #define __NR_removexattr 235 #define __NR_lremovexattr 236 #define __NR_fremovexattr 237 #define __NR_tkill 238 #define __NR_sendfile64 239 #define __NR_futex 240 #define __NR_sched_setaffinity 241 #define __NR_sched_getaffinity 242 #define __NR_set_thread_area 243 #define __NR_get_thread_area 244 #define __NR_io_setup 245 #define __NR_io_destroy 246 #define __NR_io_getevents 247 #define __NR_io_submit 248 #define __NR_io_cancel 249 #define __NR_fadvise64 250 /* 251 is available for reuse (was briefly sys_set_zone_reclaim) */ #define __NR_exit_group 252 #define __NR_lookup_dcookie 253 #define __NR_epoll_create 254 #define __NR_epoll_ctl 255 #define __NR_epoll_wait 256 #define __NR_remap_file_pages 257 #define __NR_set_tid_address 258 #define __NR_timer_create 259 #define __NR_timer_settime (__NR_timer_create+1) #define __NR_timer_gettime (__NR_timer_create+2) #define __NR_timer_getoverrun (__NR_timer_create+3) #define __NR_timer_delete (__NR_timer_create+4) #define __NR_clock_settime (__NR_timer_create+5) #define __NR_clock_gettime (__NR_timer_create+6) #define __NR_clock_getres (__NR_timer_create+7) #define __NR_clock_nanosleep (__NR_timer_create+8) #define __NR_statfs64 268 #define __NR_fstatfs64 269 #define __NR_tgkill 270 #define __NR_utimes 271 #define __NR_fadvise64_64 272 #define __NR_vserver 273 #define __NR_mbind 274 #define __NR_get_mempolicy 275 #define __NR_set_mempolicy 276 #define __NR_mq_open 277 #define __NR_mq_unlink (__NR_mq_open+1) #define __NR_mq_timedsend (__NR_mq_open+2) #define __NR_mq_timedreceive (__NR_mq_open+3) #define __NR_mq_notify (__NR_mq_open+4) #define __NR_mq_getsetattr (__NR_mq_open+5) #define __NR_kexec_load 283 #define __NR_waitid 284 /* #define __NR_sys_setaltroot 285 */ #define __NR_add_key 286 #define __NR_request_key 287 #define __NR_keyctl 288 #define __NR_ioprio_set 289 #define __NR_ioprio_get 290 #define __NR_inotify_init 291 #define __NR_inotify_add_watch 292 #define __NR_inotify_rm_watch 293 #define __NR_migrate_pages 294 #define __NR_openat 295 #define __NR_mkdirat 296 #define __NR_mknodat 297 #define __NR_fchownat 298 #define __NR_futimesat 299 #define __NR_fstatat64 300 #define __NR_unlinkat 301 #define __NR_renameat 302 #define __NR_linkat 303 #define __NR_symlinkat 304 #define __NR_readlinkat 305 #define __NR_fchmodat 306 #define __NR_faccessat 307 #define __NR_pselect6 308 #define __NR_ppoll 309 #define __NR_unshare 310 #define __NR_set_robust_list 311 #define __NR_get_robust_list 312 #define __NR_splice 313 #define __NR_sync_file_range 314 #define __NR_tee 315 #define __NR_vmsplice 316 #define __NR_move_pages 317 #define __NR_getcpu 318 #define __NR_epoll_pwait 319 #define __NR_utimensat 320 #define __NR_signalfd 321 #define __NR_timerfd_create 322 #define __NR_eventfd 323 #define __NR_fallocate 324 #define __NR_timerfd_settime 325 #define __NR_timerfd_gettime 326 #define __NR_signalfd4 327 #define __NR_eventfd2 328 #define __NR_epoll_create1 329 #define __NR_dup3 330 #define __NR_pipe2 331 #define __NR_inotify_init1 332 #define __NR_preadv 333 #define __NR_pwritev 334 #define __NR_rt_tgsigqueueinfo 335 #define __NR_perf_event_open 336 #define __NR_recvmmsg 337 #define __NR_fanotify_init 338 #define __NR_fanotify_mark 339 #define __NR_prlimit64 340 #endif /* _ASM_X86_UNISTD_32_H */ #include #ifndef _ASM_X86_E820_H #define _ASM_X86_E820_H #define E820MAP 0x2d0 /* our map */ #define E820MAX 128 /* number of entries in E820MAP */ /* * Legacy E820 BIOS limits us to 128 (E820MAX) nodes due to the * constrained space in the zeropage. If we have more nodes than * that, and if we've booted off EFI firmware, then the EFI tables * passed us from the EFI firmware can list more nodes. Size our * internal memory map tables to have room for these additional * nodes, based on up to three entries per node for which the * kernel was built: MAX_NUMNODES == (1 << CONFIG_NODES_SHIFT), * plus E820MAX, allowing space for the possible duplicate E820 * entries that might need room in the same arrays, prior to the * call to sanitize_e820_map() to remove duplicates. The allowance * of three memory map entries per node is "enough" entries for * the initial hardware platform motivating this mechanism to make * use of additional EFI map entries. Future platforms may want * to allow more than three entries per node or otherwise refine * this size. */ /* * Odd: 'make headers_check' complains about numa.h if I try * to collapse the next two #ifdef lines to a single line: * #if defined(__KERNEL__) && defined(CONFIG_EFI) */ #define E820_X_MAX E820MAX #define E820NR 0x1e8 /* # entries in E820MAP */ #define E820_RAM 1 #define E820_RESERVED 2 #define E820_ACPI 3 #define E820_NVS 4 #define E820_UNUSABLE 5 /* * reserved RAM used by kernel itself * if CONFIG_INTEL_TXT is enabled, memory of this type will be * included in the S3 integrity calculation and so should not include * any memory that BIOS might alter over the S3 transition */ #define E820_RESERVED_KERN 128 #ifndef __ASSEMBLY__ #include struct e820entry { __u64 addr; /* start of memory segment */ __u64 size; /* size of memory segment */ __u32 type; /* type of memory segment */ } __attribute__((packed)); struct e820map { __u32 nr_map; struct e820entry map[E820_X_MAX]; }; #define ISA_START_ADDRESS 0xa0000 #define ISA_END_ADDRESS 0x100000 #define BIOS_BEGIN 0x000a0000 #define BIOS_END 0x00100000 #define BIOS_ROM_BASE 0xffe00000 #define BIOS_ROM_END 0xffffffff #endif /* __ASSEMBLY__ */ #endif /* _ASM_X86_E820_H */ #ifndef _ASM_X86_UCONTEXT_H #define _ASM_X86_UCONTEXT_H #define UC_FP_XSTATE 0x1 /* indicates the presence of extended state * information in the memory layout pointed * by the fpstate pointer in the ucontext's * sigcontext struct (uc_mcontext). */ #include #endif /* _ASM_X86_UCONTEXT_H */ #include #include #ifndef _ASM_X86_SWAB_H #define _ASM_X86_SWAB_H #include static __inline__ __u32 __arch_swab32(__u32 val) { #ifdef __i386__ # ifdef CONFIG_X86_BSWAP __asm__("bswap %0" : "=r" (val) : "0" (val)); # else __asm__("xchgb %b0,%h0\n\t" /* swap lower bytes */ "rorl $16,%0\n\t" /* swap words */ "xchgb %b0,%h0" /* swap higher bytes */ : "=q" (val) : "0" (val)); # endif #else /* __i386__ */ __asm__("bswapl %0" : "=r" (val) : "0" (val)); #endif return val; } #define __arch_swab32 __arch_swab32 static __inline__ __u64 __arch_swab64(__u64 val) { #ifdef __i386__ union { struct { __u32 a; __u32 b; } s; __u64 u; } v; v.u = val; # ifdef CONFIG_X86_BSWAP __asm__("bswapl %0 ; bswapl %1 ; xchgl %0,%1" : "=r" (v.s.a), "=r" (v.s.b) : "0" (v.s.a), "1" (v.s.b)); # else v.s.a = __arch_swab32(v.s.a); v.s.b = __arch_swab32(v.s.b); __asm__("xchgl %0,%1" : "=r" (v.s.a), "=r" (v.s.b) : "0" (v.s.a), "1" (v.s.b)); # endif return v.u; #else /* __i386__ */ __asm__("bswapq %0" : "=r" (val) : "0" (val)); return val; #endif } #define __arch_swab64 __arch_swab64 #endif /* _ASM_X86_SWAB_H */ #include cmd_/usr/local/home/bellard/cpux86/rootdisk/buildroot-2011.02/output/toolchain/linux/include/asm/.install := perl scripts/headers_install.pl /usr/local/home/bellard/cpux86/rootdisk/buildroot-2011.02/output/toolchain/linux-2.6.37.2/arch/x86/include/asm /usr/local/home/bellard/cpux86/rootdisk/buildroot-2011.02/output/toolchain/linux/include/asm x86 a.out.h auxvec.h bitsperlong.h boot.h bootparam.h byteorder.h debugreg.h e820.h errno.h fcntl.h hw_breakpoint.h hyperv.h ioctl.h ioctls.h ipcbuf.h ist.h kvm.h kvm_para.h ldt.h mce.h mman.h msgbuf.h msr-index.h msr.h mtrr.h param.h poll.h posix_types.h posix_types_32.h posix_types_64.h prctl.h processor-flags.h ptrace-abi.h ptrace.h resource.h sembuf.h setup.h shmbuf.h sigcontext.h sigcontext32.h siginfo.h signal.h socket.h sockios.h stat.h statfs.h swab.h termbits.h termios.h types.h ucontext.h unistd.h unistd_32.h unistd_64.h vm86.h vsyscall.h; perl scripts/headers_install.pl /usr/local/home/bellard/cpux86/rootdisk/buildroot-2011.02/output/toolchain/linux-2.6.37.2/arch/x86/include/asm /usr/local/home/bellard/cpux86/rootdisk/buildroot-2011.02/output/toolchain/linux/include/asm x86 ; touch /usr/local/home/bellard/cpux86/rootdisk/buildroot-2011.02/output/toolchain/linux/include/asm/.install #ifndef _ASM_X86_AUXVEC_H #define _ASM_X86_AUXVEC_H /* * Architecture-neutral AT_ values in 0-17, leave some room * for more of them, start the x86-specific ones at 32. */ #ifdef __i386__ #define AT_SYSINFO 32 #endif #define AT_SYSINFO_EHDR 33 #endif /* _ASM_X86_AUXVEC_H */ #ifndef _ASM_X86_VM86_H #define _ASM_X86_VM86_H /* * I'm guessing at the VIF/VIP flag usage, but hope that this is how * the Pentium uses them. Linux will return from vm86 mode when both * VIF and VIP is set. * * On a Pentium, we could probably optimize the virtual flags directly * in the eflags register instead of doing it "by hand" in vflags... * * Linus */ #include #define BIOSSEG 0x0f000 #define CPU_086 0 #define CPU_186 1 #define CPU_286 2 #define CPU_386 3 #define CPU_486 4 #define CPU_586 5 /* * Return values for the 'vm86()' system call */ #define VM86_TYPE(retval) ((retval) & 0xff) #define VM86_ARG(retval) ((retval) >> 8) #define VM86_SIGNAL 0 /* return due to signal */ #define VM86_UNKNOWN 1 /* unhandled GP fault - IO-instruction or similar */ #define VM86_INTx 2 /* int3/int x instruction (ARG = x) */ #define VM86_STI 3 /* sti/popf/iret instruction enabled virtual interrupts */ /* * Additional return values when invoking new vm86() */ #define VM86_PICRETURN 4 /* return due to pending PIC request */ #define VM86_TRAP 6 /* return due to DOS-debugger request */ /* * function codes when invoking new vm86() */ #define VM86_PLUS_INSTALL_CHECK 0 #define VM86_ENTER 1 #define VM86_ENTER_NO_BYPASS 2 #define VM86_REQUEST_IRQ 3 #define VM86_FREE_IRQ 4 #define VM86_GET_IRQ_BITS 5 #define VM86_GET_AND_RESET_IRQ 6 /* * This is the stack-layout seen by the user space program when we have * done a translation of "SAVE_ALL" from vm86 mode. The real kernel layout * is 'kernel_vm86_regs' (see below). */ struct vm86_regs { /* * normal regs, with special meaning for the segment descriptors.. */ long ebx; long ecx; long edx; long esi; long edi; long ebp; long eax; long __null_ds; long __null_es; long __null_fs; long __null_gs; long orig_eax; long eip; unsigned short cs, __csh; long eflags; long esp; unsigned short ss, __ssh; /* * these are specific to v86 mode: */ unsigned short es, __esh; unsigned short ds, __dsh; unsigned short fs, __fsh; unsigned short gs, __gsh; }; struct revectored_struct { unsigned long __map[8]; /* 256 bits */ }; struct vm86_struct { struct vm86_regs regs; unsigned long flags; unsigned long screen_bitmap; unsigned long cpu_type; struct revectored_struct int_revectored; struct revectored_struct int21_revectored; }; /* * flags masks */ #define VM86_SCREEN_BITMAP 0x0001 struct vm86plus_info_struct { unsigned long force_return_for_pic:1; unsigned long vm86dbg_active:1; /* for debugger */ unsigned long vm86dbg_TFpendig:1; /* for debugger */ unsigned long unused:28; unsigned long is_vm86pus:1; /* for vm86 internal use */ unsigned char vm86dbg_intxxtab[32]; /* for debugger */ }; struct vm86plus_struct { struct vm86_regs regs; unsigned long flags; unsigned long screen_bitmap; unsigned long cpu_type; struct revectored_struct int_revectored; struct revectored_struct int21_revectored; struct vm86plus_info_struct vm86plus; }; #endif /* _ASM_X86_VM86_H */ #ifndef _ASM_X86_BOOT_H #define _ASM_X86_BOOT_H /* Internal svga startup constants */ #define NORMAL_VGA 0xffff /* 80x25 mode */ #define EXTENDED_VGA 0xfffe /* 80x50 mode */ #define ASK_VGA 0xfffd /* ask for it at bootup */ #endif /* _ASM_X86_BOOT_H */ #ifndef _ASM_X86_IST_H #define _ASM_X86_IST_H /* * Include file for the interface to IST BIOS * Copyright 2002 Andy Grover * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2, or (at your option) any * later version. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License for more details. */ #include struct ist_info { __u32 signature; __u32 command; __u32 event; __u32 perf_level; }; #endif /* _ASM_X86_IST_H */ #ifndef _ASM_X86_SIGNAL_H #define _ASM_X86_SIGNAL_H #ifndef __ASSEMBLY__ #include #include /* Avoid too many header ordering problems. */ struct siginfo; /* Here we must cater to libcs that poke about in kernel headers. */ #define NSIG 32 typedef unsigned long sigset_t; #endif /* __ASSEMBLY__ */ #define SIGHUP 1 #define SIGINT 2 #define SIGQUIT 3 #define SIGILL 4 #define SIGTRAP 5 #define SIGABRT 6 #define SIGIOT 6 #define SIGBUS 7 #define SIGFPE 8 #define SIGKILL 9 #define SIGUSR1 10 #define SIGSEGV 11 #define SIGUSR2 12 #define SIGPIPE 13 #define SIGALRM 14 #define SIGTERM 15 #define SIGSTKFLT 16 #define SIGCHLD 17 #define SIGCONT 18 #define SIGSTOP 19 #define SIGTSTP 20 #define SIGTTIN 21 #define SIGTTOU 22 #define SIGURG 23 #define SIGXCPU 24 #define SIGXFSZ 25 #define SIGVTALRM 26 #define SIGPROF 27 #define SIGWINCH 28 #define SIGIO 29 #define SIGPOLL SIGIO /* #define SIGLOST 29 */ #define SIGPWR 30 #define SIGSYS 31 #define SIGUNUSED 31 /* These should not be considered constants from userland. */ #define SIGRTMIN 32 #define SIGRTMAX _NSIG /* * SA_FLAGS values: * * SA_ONSTACK indicates that a registered stack_t will be used. * SA_RESTART flag to get restarting signals (which were the default long ago) * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. * SA_RESETHAND clears the handler when the signal is delivered. * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. * SA_NODEFER prevents the current signal from being masked in the handler. * * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single * Unix names RESETHAND and NODEFER respectively. */ #define SA_NOCLDSTOP 0x00000001u #define SA_NOCLDWAIT 0x00000002u #define SA_SIGINFO 0x00000004u #define SA_ONSTACK 0x08000000u #define SA_RESTART 0x10000000u #define SA_NODEFER 0x40000000u #define SA_RESETHAND 0x80000000u #define SA_NOMASK SA_NODEFER #define SA_ONESHOT SA_RESETHAND #define SA_RESTORER 0x04000000 /* * sigaltstack controls */ #define SS_ONSTACK 1 #define SS_DISABLE 2 #define MINSIGSTKSZ 2048 #define SIGSTKSZ 8192 #include #ifndef __ASSEMBLY__ #ifdef __i386__ /* Here we must cater to libcs that poke about in kernel headers. */ struct sigaction { union { __sighandler_t _sa_handler; void (*_sa_sigaction)(int, struct siginfo *, void *); } _u; sigset_t sa_mask; unsigned long sa_flags; void (*sa_restorer)(void); }; #define sa_handler _u._sa_handler #define sa_sigaction _u._sa_sigaction #else /* __i386__ */ struct sigaction { __sighandler_t sa_handler; unsigned long sa_flags; __sigrestore_t sa_restorer; sigset_t sa_mask; /* mask last for extensibility */ }; struct k_sigaction { struct sigaction sa; }; #endif /* !__i386__ */ typedef struct sigaltstack { void *ss_sp; int ss_flags; size_t ss_size; } stack_t; #endif /* __ASSEMBLY__ */ #endif /* _ASM_X86_SIGNAL_H */ #ifndef _ASM_X86_PRCTL_H #define _ASM_X86_PRCTL_H #define ARCH_SET_GS 0x1001 #define ARCH_SET_FS 0x1002 #define ARCH_GET_FS 0x1003 #define ARCH_GET_GS 0x1004 #endif /* _ASM_X86_PRCTL_H */ #include #ifndef _ASM_X86_DEBUGREG_H #define _ASM_X86_DEBUGREG_H /* Indicate the register numbers for a number of the specific debug registers. Registers 0-3 contain the addresses we wish to trap on */ #define DR_FIRSTADDR 0 /* u_debugreg[DR_FIRSTADDR] */ #define DR_LASTADDR 3 /* u_debugreg[DR_LASTADDR] */ #define DR_STATUS 6 /* u_debugreg[DR_STATUS] */ #define DR_CONTROL 7 /* u_debugreg[DR_CONTROL] */ /* Define a few things for the status register. We can use this to determine which debugging register was responsible for the trap. The other bits are either reserved or not of interest to us. */ /* Define reserved bits in DR6 which are always set to 1 */ #define DR6_RESERVED (0xFFFF0FF0) #define DR_TRAP0 (0x1) /* db0 */ #define DR_TRAP1 (0x2) /* db1 */ #define DR_TRAP2 (0x4) /* db2 */ #define DR_TRAP3 (0x8) /* db3 */ #define DR_TRAP_BITS (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3) #define DR_STEP (0x4000) /* single-step */ #define DR_SWITCH (0x8000) /* task switch */ /* Now define a bunch of things for manipulating the control register. The top two bytes of the control register consist of 4 fields of 4 bits - each field corresponds to one of the four debug registers, and indicates what types of access we trap on, and how large the data field is that we are looking at */ #define DR_CONTROL_SHIFT 16 /* Skip this many bits in ctl register */ #define DR_CONTROL_SIZE 4 /* 4 control bits per register */ #define DR_RW_EXECUTE (0x0) /* Settings for the access types to trap on */ #define DR_RW_WRITE (0x1) #define DR_RW_READ (0x3) #define DR_LEN_1 (0x0) /* Settings for data length to trap on */ #define DR_LEN_2 (0x4) #define DR_LEN_4 (0xC) #define DR_LEN_8 (0x8) /* The low byte to the control register determine which registers are enabled. There are 4 fields of two bits. One bit is "local", meaning that the processor will reset the bit after a task switch and the other is global meaning that we have to explicitly reset the bit. With linux, you can use either one, since we explicitly zero the register when we enter kernel mode. */ #define DR_LOCAL_ENABLE_SHIFT 0 /* Extra shift to the local enable bit */ #define DR_GLOBAL_ENABLE_SHIFT 1 /* Extra shift to the global enable bit */ #define DR_LOCAL_ENABLE (0x1) /* Local enable for reg 0 */ #define DR_GLOBAL_ENABLE (0x2) /* Global enable for reg 0 */ #define DR_ENABLE_SIZE 2 /* 2 enable bits per register */ #define DR_LOCAL_ENABLE_MASK (0x55) /* Set local bits for all 4 regs */ #define DR_GLOBAL_ENABLE_MASK (0xAA) /* Set global bits for all 4 regs */ /* The second byte to the control register has a few special things. We can slow the instruction pipeline for instructions coming via the gdt or the ldt if we want to. I am not sure why this is an advantage */ #ifdef __i386__ #define DR_CONTROL_RESERVED (0xFC00) /* Reserved by Intel */ #else #define DR_CONTROL_RESERVED (0xFFFFFFFF0000FC00UL) /* Reserved */ #endif #define DR_LOCAL_SLOWDOWN (0x100) /* Local slow the pipeline */ #define DR_GLOBAL_SLOWDOWN (0x200) /* Global slow the pipeline */ /* * HW breakpoint additions */ #endif /* _ASM_X86_DEBUGREG_H */ #ifndef _ASM_X86_TYPES_H #define _ASM_X86_TYPES_H #define dma_addr_t dma_addr_t #include #endif /* _ASM_X86_TYPES_H */ #ifndef _I386_HW_BREAKPOINT_H #define _I386_HW_BREAKPOINT_H #endif /* _I386_HW_BREAKPOINT_H */ #include #include #ifndef _ASM_X86_SIGCONTEXT32_H #define _ASM_X86_SIGCONTEXT32_H #include /* signal context for 32bit programs. */ #define X86_FXSR_MAGIC 0x0000 struct _fpreg { unsigned short significand[4]; unsigned short exponent; }; struct _fpxreg { unsigned short significand[4]; unsigned short exponent; unsigned short padding[3]; }; struct _xmmreg { __u32 element[4]; }; /* FSAVE frame with extensions */ struct _fpstate_ia32 { /* Regular FPU environment */ __u32 cw; __u32 sw; __u32 tag; /* not compatible to 64bit twd */ __u32 ipoff; __u32 cssel; __u32 dataoff; __u32 datasel; struct _fpreg _st[8]; unsigned short status; unsigned short magic; /* 0xffff = regular FPU data only */ /* FXSR FPU environment */ __u32 _fxsr_env[6]; __u32 mxcsr; __u32 reserved; struct _fpxreg _fxsr_st[8]; struct _xmmreg _xmm[8]; /* It's actually 16 */ __u32 padding[44]; union { __u32 padding2[12]; struct _fpx_sw_bytes sw_reserved; }; }; struct sigcontext_ia32 { unsigned short gs, __gsh; unsigned short fs, __fsh; unsigned short es, __esh; unsigned short ds, __dsh; unsigned int di; unsigned int si; unsigned int bp; unsigned int sp; unsigned int bx; unsigned int dx; unsigned int cx; unsigned int ax; unsigned int trapno; unsigned int err; unsigned int ip; unsigned short cs, __csh; unsigned int flags; unsigned int sp_at_signal; unsigned short ss, __ssh; unsigned int fpstate; /* really (struct _fpstate_ia32 *) */ unsigned int oldmask; unsigned int cr2; }; #endif /* _ASM_X86_SIGCONTEXT32_H */ #ifndef _ASM_X86_KVM_H #define _ASM_X86_KVM_H /* * KVM x86 specific structures and definitions * */ #include #include /* Select x86 specific features in */ #define __KVM_HAVE_PIT #define __KVM_HAVE_IOAPIC #define __KVM_HAVE_DEVICE_ASSIGNMENT #define __KVM_HAVE_MSI #define __KVM_HAVE_USER_NMI #define __KVM_HAVE_GUEST_DEBUG #define __KVM_HAVE_MSIX #define __KVM_HAVE_MCE #define __KVM_HAVE_PIT_STATE2 #define __KVM_HAVE_XEN_HVM #define __KVM_HAVE_VCPU_EVENTS #define __KVM_HAVE_DEBUGREGS #define __KVM_HAVE_XSAVE #define __KVM_HAVE_XCRS /* Architectural interrupt line count. */ #define KVM_NR_INTERRUPTS 256 struct kvm_memory_alias { __u32 slot; /* this has a different namespace than memory slots */ __u32 flags; __u64 guest_phys_addr; __u64 memory_size; __u64 target_phys_addr; }; /* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */ struct kvm_pic_state { __u8 last_irr; /* edge detection */ __u8 irr; /* interrupt request register */ __u8 imr; /* interrupt mask register */ __u8 isr; /* interrupt service register */ __u8 priority_add; /* highest irq priority */ __u8 irq_base; __u8 read_reg_select; __u8 poll; __u8 special_mask; __u8 init_state; __u8 auto_eoi; __u8 rotate_on_auto_eoi; __u8 special_fully_nested_mode; __u8 init4; /* true if 4 byte init */ __u8 elcr; /* PIIX edge/trigger selection */ __u8 elcr_mask; }; #define KVM_IOAPIC_NUM_PINS 24 struct kvm_ioapic_state { __u64 base_address; __u32 ioregsel; __u32 id; __u32 irr; __u32 pad; union { __u64 bits; struct { __u8 vector; __u8 delivery_mode:3; __u8 dest_mode:1; __u8 delivery_status:1; __u8 polarity:1; __u8 remote_irr:1; __u8 trig_mode:1; __u8 mask:1; __u8 reserve:7; __u8 reserved[4]; __u8 dest_id; } fields; } redirtbl[KVM_IOAPIC_NUM_PINS]; }; #define KVM_IRQCHIP_PIC_MASTER 0 #define KVM_IRQCHIP_PIC_SLAVE 1 #define KVM_IRQCHIP_IOAPIC 2 #define KVM_NR_IRQCHIPS 3 /* for KVM_GET_REGS and KVM_SET_REGS */ struct kvm_regs { /* out (KVM_GET_REGS) / in (KVM_SET_REGS) */ __u64 rax, rbx, rcx, rdx; __u64 rsi, rdi, rsp, rbp; __u64 r8, r9, r10, r11; __u64 r12, r13, r14, r15; __u64 rip, rflags; }; /* for KVM_GET_LAPIC and KVM_SET_LAPIC */ #define KVM_APIC_REG_SIZE 0x400 struct kvm_lapic_state { char regs[KVM_APIC_REG_SIZE]; }; struct kvm_segment { __u64 base; __u32 limit; __u16 selector; __u8 type; __u8 present, dpl, db, s, l, g, avl; __u8 unusable; __u8 padding; }; struct kvm_dtable { __u64 base; __u16 limit; __u16 padding[3]; }; /* for KVM_GET_SREGS and KVM_SET_SREGS */ struct kvm_sregs { /* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */ struct kvm_segment cs, ds, es, fs, gs, ss; struct kvm_segment tr, ldt; struct kvm_dtable gdt, idt; __u64 cr0, cr2, cr3, cr4, cr8; __u64 efer; __u64 apic_base; __u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64]; }; /* for KVM_GET_FPU and KVM_SET_FPU */ struct kvm_fpu { __u8 fpr[8][16]; __u16 fcw; __u16 fsw; __u8 ftwx; /* in fxsave format */ __u8 pad1; __u16 last_opcode; __u64 last_ip; __u64 last_dp; __u8 xmm[16][16]; __u32 mxcsr; __u32 pad2; }; struct kvm_msr_entry { __u32 index; __u32 reserved; __u64 data; }; /* for KVM_GET_MSRS and KVM_SET_MSRS */ struct kvm_msrs { __u32 nmsrs; /* number of msrs in entries */ __u32 pad; struct kvm_msr_entry entries[0]; }; /* for KVM_GET_MSR_INDEX_LIST */ struct kvm_msr_list { __u32 nmsrs; /* number of msrs in entries */ __u32 indices[0]; }; struct kvm_cpuid_entry { __u32 function; __u32 eax; __u32 ebx; __u32 ecx; __u32 edx; __u32 padding; }; /* for KVM_SET_CPUID */ struct kvm_cpuid { __u32 nent; __u32 padding; struct kvm_cpuid_entry entries[0]; }; struct kvm_cpuid_entry2 { __u32 function; __u32 index; __u32 flags; __u32 eax; __u32 ebx; __u32 ecx; __u32 edx; __u32 padding[3]; }; #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX 1 #define KVM_CPUID_FLAG_STATEFUL_FUNC 2 #define KVM_CPUID_FLAG_STATE_READ_NEXT 4 /* for KVM_SET_CPUID2 */ struct kvm_cpuid2 { __u32 nent; __u32 padding; struct kvm_cpuid_entry2 entries[0]; }; /* for KVM_GET_PIT and KVM_SET_PIT */ struct kvm_pit_channel_state { __u32 count; /* can be 65536 */ __u16 latched_count; __u8 count_latched; __u8 status_latched; __u8 status; __u8 read_state; __u8 write_state; __u8 write_latch; __u8 rw_mode; __u8 mode; __u8 bcd; __u8 gate; __s64 count_load_time; }; struct kvm_debug_exit_arch { __u32 exception; __u32 pad; __u64 pc; __u64 dr6; __u64 dr7; }; #define KVM_GUESTDBG_USE_SW_BP 0x00010000 #define KVM_GUESTDBG_USE_HW_BP 0x00020000 #define KVM_GUESTDBG_INJECT_DB 0x00040000 #define KVM_GUESTDBG_INJECT_BP 0x00080000 /* for KVM_SET_GUEST_DEBUG */ struct kvm_guest_debug_arch { __u64 debugreg[8]; }; struct kvm_pit_state { struct kvm_pit_channel_state channels[3]; }; #define KVM_PIT_FLAGS_HPET_LEGACY 0x00000001 struct kvm_pit_state2 { struct kvm_pit_channel_state channels[3]; __u32 flags; __u32 reserved[9]; }; struct kvm_reinject_control { __u8 pit_reinject; __u8 reserved[31]; }; /* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */ #define KVM_VCPUEVENT_VALID_NMI_PENDING 0x00000001 #define KVM_VCPUEVENT_VALID_SIPI_VECTOR 0x00000002 #define KVM_VCPUEVENT_VALID_SHADOW 0x00000004 /* Interrupt shadow states */ #define KVM_X86_SHADOW_INT_MOV_SS 0x01 #define KVM_X86_SHADOW_INT_STI 0x02 /* for KVM_GET/SET_VCPU_EVENTS */ struct kvm_vcpu_events { struct { __u8 injected; __u8 nr; __u8 has_error_code; __u8 pad; __u32 error_code; } exception; struct { __u8 injected; __u8 nr; __u8 soft; __u8 shadow; } interrupt; struct { __u8 injected; __u8 pending; __u8 masked; __u8 pad; } nmi; __u32 sipi_vector; __u32 flags; __u32 reserved[10]; }; /* for KVM_GET/SET_DEBUGREGS */ struct kvm_debugregs { __u64 db[4]; __u64 dr6; __u64 dr7; __u64 flags; __u64 reserved[9]; }; /* for KVM_CAP_XSAVE */ struct kvm_xsave { __u32 region[1024]; }; #define KVM_MAX_XCRS 16 struct kvm_xcr { __u32 xcr; __u32 reserved; __u64 value; }; struct kvm_xcrs { __u32 nr_xcrs; __u32 flags; struct kvm_xcr xcrs[KVM_MAX_XCRS]; __u64 padding[16]; }; #endif /* _ASM_X86_KVM_H */ #ifndef _ASM_X86_MSR_H #define _ASM_X86_MSR_H #include #ifndef __ASSEMBLY__ #include #include #define X86_IOC_RDMSR_REGS _IOWR('c', 0xA0, __u32[8]) #define X86_IOC_WRMSR_REGS _IOWR('c', 0xA1, __u32[8]) #endif /* __ASSEMBLY__ */ #endif /* _ASM_X86_MSR_H */ #ifndef _ASM_X86_MSR_INDEX_H #define _ASM_X86_MSR_INDEX_H /* CPU model specific register (MSR) numbers */ /* x86-64 specific MSRs */ #define MSR_EFER 0xc0000080 /* extended feature register */ #define MSR_STAR 0xc0000081 /* legacy mode SYSCALL target */ #define MSR_LSTAR 0xc0000082 /* long mode SYSCALL target */ #define MSR_CSTAR 0xc0000083 /* compat mode SYSCALL target */ #define MSR_SYSCALL_MASK 0xc0000084 /* EFLAGS mask for syscall */ #define MSR_FS_BASE 0xc0000100 /* 64bit FS base */ #define MSR_GS_BASE 0xc0000101 /* 64bit GS base */ #define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow */ #define MSR_TSC_AUX 0xc0000103 /* Auxiliary TSC */ /* EFER bits: */ #define _EFER_SCE 0 /* SYSCALL/SYSRET */ #define _EFER_LME 8 /* Long mode enable */ #define _EFER_LMA 10 /* Long mode active (read-only) */ #define _EFER_NX 11 /* No execute enable */ #define _EFER_SVME 12 /* Enable virtualization */ #define _EFER_LMSLE 13 /* Long Mode Segment Limit Enable */ #define _EFER_FFXSR 14 /* Enable Fast FXSAVE/FXRSTOR */ #define EFER_SCE (1<<_EFER_SCE) #define EFER_LME (1<<_EFER_LME) #define EFER_LMA (1<<_EFER_LMA) #define EFER_NX (1<<_EFER_NX) #define EFER_SVME (1<<_EFER_SVME) #define EFER_LMSLE (1<<_EFER_LMSLE) #define EFER_FFXSR (1<<_EFER_FFXSR) /* Intel MSRs. Some also available on other CPUs */ #define MSR_IA32_PERFCTR0 0x000000c1 #define MSR_IA32_PERFCTR1 0x000000c2 #define MSR_FSB_FREQ 0x000000cd #define MSR_MTRRcap 0x000000fe #define MSR_IA32_BBL_CR_CTL 0x00000119 #define MSR_IA32_SYSENTER_CS 0x00000174 #define MSR_IA32_SYSENTER_ESP 0x00000175 #define MSR_IA32_SYSENTER_EIP 0x00000176 #define MSR_IA32_MCG_CAP 0x00000179 #define MSR_IA32_MCG_STATUS 0x0000017a #define MSR_IA32_MCG_CTL 0x0000017b #define MSR_IA32_PEBS_ENABLE 0x000003f1 #define MSR_IA32_DS_AREA 0x00000600 #define MSR_IA32_PERF_CAPABILITIES 0x00000345 #define MSR_MTRRfix64K_00000 0x00000250 #define MSR_MTRRfix16K_80000 0x00000258 #define MSR_MTRRfix16K_A0000 0x00000259 #define MSR_MTRRfix4K_C0000 0x00000268 #define MSR_MTRRfix4K_C8000 0x00000269 #define MSR_MTRRfix4K_D0000 0x0000026a #define MSR_MTRRfix4K_D8000 0x0000026b #define MSR_MTRRfix4K_E0000 0x0000026c #define MSR_MTRRfix4K_E8000 0x0000026d #define MSR_MTRRfix4K_F0000 0x0000026e #define MSR_MTRRfix4K_F8000 0x0000026f #define MSR_MTRRdefType 0x000002ff #define MSR_IA32_CR_PAT 0x00000277 #define MSR_IA32_DEBUGCTLMSR 0x000001d9 #define MSR_IA32_LASTBRANCHFROMIP 0x000001db #define MSR_IA32_LASTBRANCHTOIP 0x000001dc #define MSR_IA32_LASTINTFROMIP 0x000001dd #define MSR_IA32_LASTINTTOIP 0x000001de /* DEBUGCTLMSR bits (others vary by model): */ #define DEBUGCTLMSR_LBR (1UL << 0) /* last branch recording */ #define DEBUGCTLMSR_BTF (1UL << 1) /* single-step on branches */ #define DEBUGCTLMSR_TR (1UL << 6) #define DEBUGCTLMSR_BTS (1UL << 7) #define DEBUGCTLMSR_BTINT (1UL << 8) #define DEBUGCTLMSR_BTS_OFF_OS (1UL << 9) #define DEBUGCTLMSR_BTS_OFF_USR (1UL << 10) #define DEBUGCTLMSR_FREEZE_LBRS_ON_PMI (1UL << 11) #define MSR_IA32_MC0_CTL 0x00000400 #define MSR_IA32_MC0_STATUS 0x00000401 #define MSR_IA32_MC0_ADDR 0x00000402 #define MSR_IA32_MC0_MISC 0x00000403 #define MSR_IA32_MCx_CTL(x) (MSR_IA32_MC0_CTL + 4*(x)) #define MSR_IA32_MCx_STATUS(x) (MSR_IA32_MC0_STATUS + 4*(x)) #define MSR_IA32_MCx_ADDR(x) (MSR_IA32_MC0_ADDR + 4*(x)) #define MSR_IA32_MCx_MISC(x) (MSR_IA32_MC0_MISC + 4*(x)) /* These are consecutive and not in the normal 4er MCE bank block */ #define MSR_IA32_MC0_CTL2 0x00000280 #define MSR_IA32_MCx_CTL2(x) (MSR_IA32_MC0_CTL2 + (x)) #define MSR_P6_PERFCTR0 0x000000c1 #define MSR_P6_PERFCTR1 0x000000c2 #define MSR_P6_EVNTSEL0 0x00000186 #define MSR_P6_EVNTSEL1 0x00000187 /* AMD64 MSRs. Not complete. See the architecture manual for a more complete list. */ #define MSR_AMD64_PATCH_LEVEL 0x0000008b #define MSR_AMD64_NB_CFG 0xc001001f #define MSR_AMD64_PATCH_LOADER 0xc0010020 #define MSR_AMD64_OSVW_ID_LENGTH 0xc0010140 #define MSR_AMD64_OSVW_STATUS 0xc0010141 #define MSR_AMD64_DC_CFG 0xc0011022 #d