*TLV_LIST_DATA(struct tlv_list_desc *list) { return TLV_DATA(list->tlv_ptr); } static __inline__ void TLV_LIST_STEP(struct tlv_list_desc *list) { __u16 tlv_space = TLV_ALIGN(ntohs(list->tlv_ptr->tlv_len)); list->tlv_ptr = (struct tlv_desc *)((char *)list->tlv_ptr + tlv_space); list->tlv_space -= tlv_space; } /* * Configuration messages exchanged via NETLINK_GENERIC use the following * family id, name, version and command. */ #define TIPC_GENL_NAME "TIPC" #define TIPC_GENL_VERSION 0x1 #define TIPC_GENL_CMD 0x1 /* * TIPC specific header used in NETLINK_GENERIC requests. */ struct tipc_genlmsghdr { __u32 dest; /* Destination address */ __u16 cmd; /* Command */ __u16 reserved; /* Unused */ }; #define TIPC_GENL_HDRLEN NLMSG_ALIGN(sizeof(struct tipc_genlmsghdr)) /* * Configuration messages exchanged via TIPC sockets use the TIPC configuration * message header, which is defined below. This structure is analogous * to the Netlink message header, but fields are stored in network byte order * and no padding is permitted between the header and the message data * that follows. */ struct tipc_cfg_msg_hdr { __be32 tcm_len; /* Message length (including header) */ __be16 tcm_type; /* Command type */ __be16 tcm_flags; /* Additional flags */ char tcm_reserved[8]; /* Unused */ }; #define TCM_F_REQUEST 0x1 /* Flag: Request message */ #define TCM_F_MORE 0x2 /* Flag: Message to be continued */ #define TCM_ALIGN(datalen) (((datalen)+3) & ~3) #define TCM_LENGTH(datalen) (sizeof(struct tipc_cfg_msg_hdr) + datalen) #define TCM_SPACE(datalen) (TCM_ALIGN(TCM_LENGTH(datalen))) #define TCM_DATA(tcm_hdr) ((void *)((char *)(tcm_hdr) + TCM_LENGTH(0))) static __inline__ int TCM_SET(void *msg, __u16 cmd, __u16 flags, void *data, __u16 data_len) { struct tipc_cfg_msg_hdr *tcm_hdr; int msg_len; msg_len = TCM_LENGTH(data_len); tcm_hdr = (struct tipc_cfg_msg_hdr *)msg; tcm_hdr->tcm_len = htonl(msg_len); tcm_hdr->tcm_type = htons(cmd); tcm_hdr->tcm_flags = htons(flags); if (data_len && data) memcpy(TCM_DATA(msg), data, data_len); return TCM_SPACE(data_len); } #endif #ifndef __LINUX_IP_NETFILTER_H #define __LINUX_IP_NETFILTER_H /* IPv4-specific defines for netfilter. * (C)1998 Rusty Russell -- This code is GPL. */ #include /* only for userspace compatibility */ /* IP Cache bits. */ /* Src IP address. */ #define NFC_IP_SRC 0x0001 /* Dest IP address. */ #define NFC_IP_DST 0x0002 /* Input device. */ #define NFC_IP_IF_IN 0x0004 /* Output device. */ #define NFC_IP_IF_OUT 0x0008 /* TOS. */ #define NFC_IP_TOS 0x0010 /* Protocol. */ #define NFC_IP_PROTO 0x0020 /* IP options. */ #define NFC_IP_OPTIONS 0x0040 /* Frag & flags. */ #define NFC_IP_FRAG 0x0080 /* Per-protocol information: only matters if proto match. */ /* TCP flags. */ #define NFC_IP_TCPFLAGS 0x0100 /* Source port. */ #define NFC_IP_SRC_PT 0x0200 /* Dest port. */ #define NFC_IP_DST_PT 0x0400 /* Something else about the proto */ #define NFC_IP_PROTO_UNKNOWN 0x2000 /* IP Hooks */ /* After promisc drops, checksum checks. */ #define NF_IP_PRE_ROUTING 0 /* If the packet is destined for this box. */ #define NF_IP_LOCAL_IN 1 /* If the packet is destined for another interface. */ #define NF_IP_FORWARD 2 /* Packets coming from a local process. */ #define NF_IP_LOCAL_OUT 3 /* Packets about to hit the wire. */ #define NF_IP_POST_ROUTING 4 #define NF_IP_NUMHOOKS 5 enum nf_ip_hook_priorities { NF_IP_PRI_FIRST = INT_MIN, NF_IP_PRI_CONNTRACK_DEFRAG = -400, NF_IP_PRI_RAW = -300, NF_IP_PRI_SELINUX_FIRST = -225, NF_IP_PRI_CONNTRACK = -200, NF_IP_PRI_MANGLE = -150, NF_IP_PRI_NAT_DST = -100, NF_IP_PRI_FILTER = 0, NF_IP_PRI_SECURITY = 50, NF_IP_PRI_NAT_SRC = 100, NF_IP_PRI_SELINUX_LAST = 225, NF_IP_PRI_CONNTRACK_CONFIRM = INT_MAX, NF_IP_PRI_LAST = INT_MAX, }; /* Arguments for setsockopt SOL_IP: */ /* 2.0 firewalling went from 64 through 71 (and +256, +512, etc). */ /* 2.2 firewalling (+ masq) went from 64 through 76 */ /* 2.4 firewalling went 64 through 67. */ #define SO_ORIGINAL_DST 80 #endif /*__LINUX_IP_NETFILTER_H*/ /* * Performance events: * * Copyright (C) 2008-2009, Thomas Gleixner * Copyright (C) 2008-2009, Red Hat, Inc., Ingo Molnar * Copyright (C) 2008-2009, Red Hat, Inc., Peter Zijlstra * * Data type definitions, declarations, prototypes. * * Started by: Thomas Gleixner and Ingo Molnar * * For licencing details see kernel-base/COPYING */ #ifndef _LINUX_PERF_EVENT_H #define _LINUX_PERF_EVENT_H #include #include #include /* * User-space ABI bits: */ /* * attr.type */ enum perf_type_id { PERF_TYPE_HARDWARE = 0, PERF_TYPE_SOFTWARE = 1, PERF_TYPE_TRACEPOINT = 2, PERF_TYPE_HW_CACHE = 3, PERF_TYPE_RAW = 4, PERF_TYPE_BREAKPOINT = 5, PERF_TYPE_MAX, /* non-ABI */ }; /* * Generalized performance event event_id types, used by the * attr.event_id parameter of the sys_perf_event_open() * syscall: */ enum perf_hw_id { /* * Common hardware events, generalized by the kernel: */ PERF_COUNT_HW_CPU_CYCLES = 0, PERF_COUNT_HW_INSTRUCTIONS = 1, PERF_COUNT_HW_CACHE_REFERENCES = 2, PERF_COUNT_HW_CACHE_MISSES = 3, PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4, PERF_COUNT_HW_BRANCH_MISSES = 5, PERF_COUNT_HW_BUS_CYCLES = 6, PERF_COUNT_HW_MAX, /* non-ABI */ }; /* * Generalized hardware cache events: * * { L1-D, L1-I, LLC, ITLB, DTLB, BPU } x * { read, write, prefetch } x * { accesses, misses } */ enum perf_hw_cache_id { PERF_COUNT_HW_CACHE_L1D = 0, PERF_COUNT_HW_CACHE_L1I = 1, PERF_COUNT_HW_CACHE_LL = 2, PERF_COUNT_HW_CACHE_DTLB = 3, PERF_COUNT_HW_CACHE_ITLB = 4, PERF_COUNT_HW_CACHE_BPU = 5, PERF_COUNT_HW_CACHE_MAX, /* non-ABI */ }; enum perf_hw_cache_op_id { PERF_COUNT_HW_CACHE_OP_READ = 0, PERF_COUNT_HW_CACHE_OP_WRITE = 1, PERF_COUNT_HW_CACHE_OP_PREFETCH = 2, PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */ }; enum perf_hw_cache_op_result_id { PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0, PERF_COUNT_HW_CACHE_RESULT_MISS = 1, PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */ }; /* * Special "software" events provided by the kernel, even if the hardware * does not support performance events. These events measure various * physical and sw events of the kernel (and allow the profiling of them as * well): */ enum perf_sw_ids { PERF_COUNT_SW_CPU_CLOCK = 0, PERF_COUNT_SW_TASK_CLOCK = 1, PERF_COUNT_SW_PAGE_FAULTS = 2, PERF_COUNT_SW_CONTEXT_SWITCHES = 3, PERF_COUNT_SW_CPU_MIGRATIONS = 4, PERF_COUNT_SW_PAGE_FAULTS_MIN = 5, PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6, PERF_COUNT_SW_ALIGNMENT_FAULTS = 7, PERF_COUNT_SW_EMULATION_FAULTS = 8, PERF_COUNT_SW_MAX, /* non-ABI */ }; /* * Bits that can be set in attr.sample_type to request information * in the overflow packets. */ enum perf_event_sample_format { PERF_SAMPLE_IP = 1U << 0, PERF_SAMPLE_TID = 1U << 1, PERF_SAMPLE_TIME = 1U << 2, PERF_SAMPLE_ADDR = 1U << 3, PERF_SAMPLE_READ = 1U << 4, PERF_SAMPLE_CALLCHAIN = 1U << 5, PERF_SAMPLE_ID = 1U << 6, PERF_SAMPLE_CPU = 1U << 7, PERF_SAMPLE_PERIOD = 1U << 8, PERF_SAMPLE_STREAM_ID = 1U << 9, PERF_SAMPLE_RAW = 1U << 10, PERF_SAMPLE_MAX = 1U << 11, /* non-ABI */ }; /* * The format of the data returned by read() on a perf event fd, * as specified by attr.read_format: * * struct read_format { * { u64 value; * { u64 time_enabled; } && PERF_FORMAT_ENABLED * { u64 time_running; } && PERF_FORMAT_RUNNING * { u64 id; } && PERF_FORMAT_ID * } && !PERF_FORMAT_GROUP * * { u64 nr; * { u64 time_enabled; } && PERF_FORMAT_ENABLED * { u64 time_running; } && PERF_FORMAT_RUNNING * { u64 value; * { u64 id; } && PERF_FORMAT_ID * } cntr[nr]; * } && PERF_FORMAT_GROUP * }; */ enum perf_event_read_format { PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, PERF_FORMAT_ID = 1U << 2, PERF_FORMAT_GROUP = 1U << 3, PERF_FORMAT_MAX = 1U << 4, /* non-ABI */ }; #define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */ /* * Hardware event_id to monitor via a performance monitoring event: */ struct perf_event_attr { /* * Major type: hardware/software/tracepoint/etc. */ __u32 type; /* * Size of the attr structure, for fwd/bwd compat. */ __u32 size; /* * Type specific configuration information. */ __u64 config; union { __u64 sample_period; __u64 sample_freq; }; __u64 sample_type; __u64 read_format; __u64 disabled : 1, /* off by default */ inherit : 1, /* children inherit it */ pinned : 1, /* must always be on PMU */ exclusive : 1, /* only group on PMU */ exclude_user : 1, /* don't count user */ exclude_kernel : 1, /* ditto kernel */ exclude_hv : 1, /* ditto hypervisor */ exclude_idle : 1, /* don't count when idle */ mmap : 1, /* include mmap data */ comm : 1, /* include comm data */ freq : 1, /* use freq, not period */ inherit_stat : 1, /* per task counts */ enable_on_exec : 1, /* next exec enables */ task : 1, /* trace fork/exit */ watermark : 1, /* wakeup_watermark */ /* * precise_ip: * * 0 - SAMPLE_IP can have arbitrary skid * 1 - SAMPLE_IP must have constant skid * 2 - SAMPLE_IP requested to have 0 skid * 3 - SAMPLE_IP must have 0 skid * * See also PERF_RECORD_MISC_EXACT_IP */ precise_ip : 2, /* skid constraint */ mmap_data : 1, /* non-exec mmap data */ __reserved_1 : 46; union { __u32 wakeup_events; /* wakeup every n events */ __u32 wakeup_watermark; /* bytes before wakeup */ }; __u32 bp_type; __u64 bp_addr; __u64 bp_len; }; /* * Ioctls that can be done on a perf event fd: */ #define PERF_EVENT_IOC_ENABLE _IO ('$', 0) #define PERF_EVENT_IOC_DISABLE _IO ('$', 1) #define PERF_EVENT_IOC_REFRESH _IO ('$', 2) #define PERF_EVENT_IOC_RESET _IO ('$', 3) #define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64) #define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5) #define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *) enum perf_event_ioc_flags { PERF_IOC_FLAG_GROUP = 1U << 0, }; /* * Structure of the page that can be mapped via mmap */ struct perf_event_mmap_page { __u32 version; /* version number of this structure */ __u32 compat_version; /* lowest version this is compat with */ /* * Bits needed to read the hw events in user-space. * * u32 seq; * s64 count; * * do { * seq = pc->lock; * * barrier() * if (pc->index) { * count = pmc_read(pc->index - 1); * count += pc->offset; * } else * goto regular_read; * * barrier(); * } while (pc->lock != seq); * * NOTE: for obvious reason this only works on self-monitoring * processes. */ __u32 lock; /* seqlock for synchronization */ __u32 index; /* hardware event identifier */ __s64 offset; /* add to hardware event value */ __u64 time_enabled; /* time event active */ __u64 time_running; /* time event on cpu */ /* * Hole for extension of the self monitor capabilities */ __u64 __reserved[123]; /* align to 1k */ /* * Control data for the mmap() data buffer. * * User-space reading the @data_head value should issue an rmb(), on * SMP capable platforms, after reading this value -- see * perf_event_wakeup(). * * When the mapping is PROT_WRITE the @data_tail value should be * written by userspace to reflect the last read data. In this case * the kernel will not over-write unread data. */ __u64 data_head; /* head in the data section */ __u64 data_tail; /* user-space written tail */ }; #define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0) #define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0) #define PERF_RECORD_MISC_KERNEL (1 << 0) #define PERF_RECORD_MISC_USER (2 << 0) #define PERF_RECORD_MISC_HYPERVISOR (3 << 0) #define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0) #define PERF_RECORD_MISC_GUEST_USER (5 << 0) /* * Indicates that the content of PERF_SAMPLE_IP points to * the actual instruction that triggered the event. See also * perf_event_attr::precise_ip. */ #define PERF_RECORD_MISC_EXACT_IP (1 << 14) /* * Reserve the last bit to indicate some extended misc field */ #define PERF_RECORD_MISC_EXT_RESERVED (1 << 15) struct perf_event_header { __u32 type; __u16 misc; __u16 size; }; enum perf_event_type { /* * The MMAP events record the PROT_EXEC mappings so that we can * correlate userspace IPs to code. They have the following structure: * * struct { * struct perf_event_header header; * * u32 pid, tid; * u64 addr; * u64 len; * u64 pgoff; * char filename[]; * }; */ PERF_RECORD_MMAP = 1, /* * struct { * struct perf_event_header header; * u64 id; * u64 lost; * }; */ PERF_RECORD_LOST = 2, /* * struct { * struct perf_event_header header; * * u32 pid, tid; * char comm[]; * }; */ PERF_RECORD_COMM = 3, /* * struct { * struct perf_event_header header; * u32 pid, ppid; * u32 tid, ptid; * u64 time; * }; */ PERF_RECORD_EXIT = 4, /* * struct { * struct perf_event_header header; * u64 time; * u64 id; * u64 stream_id; * }; */ PERF_RECORD_THROTTLE = 5, PERF_RECORD_UNTHROTTLE = 6, /* * struct { * struct perf_event_header header; * u32 pid, ppid; * u32 tid, ptid; * u64 time; * }; */ PERF_RECORD_FORK = 7, /* * struct { * struct perf_event_header header; * u32 pid, tid; * * struct read_format values; * }; */ PERF_RECORD_READ = 8, /* * struct { * struct perf_event_header header; * * { u64 ip; } && PERF_SAMPLE_IP * { u32 pid, tid; } && PERF_SAMPLE_TID * { u64 time; } && PERF_SAMPLE_TIME * { u64 addr; } && PERF_SAMPLE_ADDR * { u64 id; } && PERF_SAMPLE_ID * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID * { u32 cpu, res; } && PERF_SAMPLE_CPU * { u64 period; } && PERF_SAMPLE_PERIOD * * { struct read_format values; } && PERF_SAMPLE_READ * * { u64 nr, * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN * * # * # The RAW record below is opaque data wrt the ABI * # * # That is, the ABI doesn't make any promises wrt to * # the stability of its content, it may vary depending * # on event, hardware, kernel version and phase of * # the moon. * # * # In other words, PERF_SAMPLE_RAW contents are not an ABI. * # * * { u32 size; * char data[size];}&& PERF_SAMPLE_RAW * }; */ PERF_RECORD_SAMPLE = 9, PERF_RECORD_MAX, /* non-ABI */ }; enum perf_callchain_context { PERF_CONTEXT_HV = (__u64)-32, PERF_CONTEXT_KERNEL = (__u64)-128, PERF_CONTEXT_USER = (__u64)-512, PERF_CONTEXT_GUEST = (__u64)-2048, PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176, PERF_CONTEXT_GUEST_USER = (__u64)-2560, PERF_CONTEXT_MAX = (__u64)-4095, }; #define PERF_FLAG_FD_NO_GROUP (1U << 0) #define PERF_FLAG_FD_OUTPUT (1U << 1) #endif /* _LINUX_PERF_EVENT_H */ #ifndef _LINUX_TYPES_H #define _LINUX_TYPES_H #include #ifndef __ASSEMBLY__ #include /* * Below are truly Linux-specific types that should never collide with * any application/library that wants linux/types.h. */ #ifdef __CHECKER__ #define __bitwise__ __attribute__((bitwise)) #else #define __bitwise__ #endif #ifdef __CHECK_ENDIAN__ #define __bitwise __bitwise__ #else #define __bitwise #endif typedef __u16 __bitwise __le16; typedef __u16 __bitwise __be16; typedef __u32 __bitwise __le32; typedef __u32 __bitwise __be32; typedef __u64 __bitwise __le64; typedef __u64 __bitwise __be64; typedef __u16 __bitwise __sum16; typedef __u32 __bitwise __wsum; /* * aligned_u64 should be used in defining kernel<->userspace ABIs to avoid * common 32/64-bit compat problems. * 64-bit values align to 4-byte boundaries on x86_32 (and possibly other * architectures) and to 8-byte boundaries on 64-bit architetures. The new * aligned_64 type enforces 8-byte alignment so that structs containing * aligned_64 values have the same alignment on 32-bit and 64-bit architectures. * No conversions are necessary between 32-bit user-space and a 64-bit kernel. */ #define __aligned_u64 __u64 __attribute__((aligned(8))) #define __aligned_be64 __be64 __attribute__((aligned(8))) #define __aligned_le64 __le64 __attribute__((aligned(8))) #endif /* __ASSEMBLY__ */ #endif /* _LINUX_TYPES_H */ /* ------------------------------------------------------------------------- */ /* */ /* i2c.h - definitions for the i2c-bus interface */ /* */ /* ------------------------------------------------------------------------- */ /* Copyright (C) 1995-2000 Simon G. Vogl This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ /* ------------------------------------------------------------------------- */ /* With some changes from Kyösti Mälkki and Frodo Looijaard */ #ifndef _LINUX_I2C_H #define _LINUX_I2C_H #include /** * struct i2c_msg - an I2C transaction segment beginning with START * @addr: Slave address, either seven or ten bits. When this is a ten * bit address, I2C_M_TEN must be set in @flags and the adapter * must support I2C_FUNC_10BIT_ADDR. * @flags: I2C_M_RD is handled by all adapters. No other flags may be * provided unless the adapter exported the relevant I2C_FUNC_* * flags through i2c_check_functionality(). * @len: Number of data bytes in @buf being read from or written to the * I2C slave address. For read transactions where I2C_M_RECV_LEN * is set, the caller guarantees that this buffer can hold up to * 32 bytes in addition to the initial length byte sent by the * slave (plus, if used, the SMBus PEC); and this value will be * incremented by the number of block data bytes received. * @buf: The buffer into which data is read, or from which it's written. * * An i2c_msg is the low level representation of one segment of an I2C * transaction. It is visible to drivers in the @i2c_transfer() procedure, * to userspace from i2c-dev, and to I2C adapter drivers through the * @i2c_adapter.@master_xfer() method. * * Except when I2C "protocol mangling" is used, all I2C adapters implement * the standard rules for I2C transactions. Each transaction begins with a * START. That is followed by the slave address, and a bit encoding read * versus write. Then follow all the data bytes, possibly including a byte * with SMBus PEC. The transfer terminates with a NAK, or when all those * bytes have been transferred and ACKed. If this is the last message in a * group, it is followed by a STOP. Otherwise it is followed by the next * @i2c_msg transaction segment, beginning with a (repeated) START. * * Alternatively, when the adapter supports I2C_FUNC_PROTOCOL_MANGLING then * passing certain @flags may have changed those standard protocol behaviors. * Those flags are only for use with broken/nonconforming slaves, and with * adapters which are known to support the specific mangling options they * need (one or more of IGNORE_NAK, NO_RD_ACK, NOSTART, and REV_DIR_ADDR). */ struct i2c_msg { __u16 addr; /* slave address */ __u16 flags; #define I2C_M_TEN 0x0010 /* this is a ten bit chip address */ #define I2C_M_RD 0x0001 /* read data, from slave to master */ #define I2C_M_NOSTART 0x4000 /* if I2C_FUNC_PROTOCOL_MANGLING */ #define I2C_M_REV_DIR_ADDR 0x2000 /* if I2C_FUNC_PROTOCOL_MANGLING */ #define I2C_M_IGNORE_NAK 0x1000 /* if I2C_FUNC_PROTOCOL_MANGLING */ #define I2C_M_NO_RD_ACK 0x0800 /* if I2C_FUNC_PROTOCOL_MANGLING */ #define I2C_M_RECV_LEN 0x0400 /* length will be first received byte */ __u16 len; /* msg length */ __u8 *buf; /* pointer to msg data */ }; /* To determine what functionality is present */ #define I2C_FUNC_I2C 0x00000001 #define I2C_FUNC_10BIT_ADDR 0x00000002 #define I2C_FUNC_PROTOCOL_MANGLING 0x00000004 /* I2C_M_NOSTART etc. */ #define I2C_FUNC_SMBUS_PEC 0x00000008 #define I2C_FUNC_SMBUS_BLOCK_PROC_CALL 0x00008000 /* SMBus 2.0 */ #define I2C_FUNC_SMBUS_QUICK 0x00010000 #define I2C_FUNC_SMBUS_READ_BYTE 0x00020000 #define I2C_FUNC_SMBUS_WRITE_BYTE 0x00040000 #define I2C_FUNC_SMBUS_READ_BYTE_DATA 0x00080000 #define I2C_FUNC_SMBUS_WRITE_BYTE_DATA 0x00100000 #define I2C_FUNC_SMBUS_READ_WORD_DATA 0x00200000 #define I2C_FUNC_SMBUS_WRITE_WORD_DATA 0x00400000 #define I2C_FUNC_SMBUS_PROC_CALL 0x00800000 #define I2C_FUNC_SMBUS_READ_BLOCK_DATA 0x01000000 #define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000 #define I2C_FUNC_SMBUS_READ_I2C_BLOCK 0x04000000 /* I2C-like block xfer */ #define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000 /* w/ 1-byte reg. addr. */ #define I2C_FUNC_SMBUS_BYTE (I2C_FUNC_SMBUS_READ_BYTE | \ I2C_FUNC_SMBUS_WRITE_BYTE) #define I2C_FUNC_SMBUS_BYTE_DATA (I2C_FUNC_SMBUS_READ_BYTE_DATA | \ I2C_FUNC_SMBUS_WRITE_BYTE_DATA) #define I2C_FUNC_SMBUS_WORD_DATA (I2C_FUNC_SMBUS_READ_WORD_DATA | \ I2C_FUNC_SMBUS_WRITE_WORD_DATA) #define I2C_FUNC_SMBUS_BLOCK_DATA (I2C_FUNC_SMBUS_READ_BLOCK_DATA | \ I2C_FUNC_SMBUS_WRITE_BLOCK_DATA) #define I2C_FUNC_SMBUS_I2C_BLOCK (I2C_FUNC_SMBUS_READ_I2C_BLOCK | \ I2C_FUNC_SMBUS_WRITE_I2C_BLOCK) #define I2C_FUNC_SMBUS_EMUL (I2C_FUNC_SMBUS_QUICK | \ I2C_FUNC_SMBUS_BYTE | \ I2C_FUNC_SMBUS_BYTE_DATA | \ I2C_FUNC_SMBUS_WORD_DATA | \ I2C_FUNC_SMBUS_PROC_CALL | \ I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | \ I2C_FUNC_SMBUS_I2C_BLOCK | \ I2C_FUNC_SMBUS_PEC) /* * Data for SMBus Messages */ #define I2C_SMBUS_BLOCK_MAX 32 /* As specified in SMBus standard */ union i2c_smbus_data { __u8 byte; __u16 word; __u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */ /* and one more for user-space compatibility */ }; /* i2c_smbus_xfer read or write markers */ #define I2C_SMBUS_READ 1 #define I2C_SMBUS_WRITE 0 /* SMBus transaction types (size parameter in the above functions) Note: these no longer correspond to the (arbitrary) PIIX4 internal codes! */ #define I2C_SMBUS_QUICK 0 #define I2C_SMBUS_BYTE 1 #define I2C_SMBUS_BYTE_DATA 2 #define I2C_SMBUS_WORD_DATA 3 #define I2C_SMBUS_PROC_CALL 4 #define I2C_SMBUS_BLOCK_DATA 5 #define I2C_SMBUS_I2C_BLOCK_BROKEN 6 #define I2C_SMBUS_BLOCK_PROC_CALL 7 /* SMBus 2.0 */ #define I2C_SMBUS_I2C_BLOCK_DATA 8 #endif /* _LINUX_I2C_H */ /* * linux/include/linux/ppdev.h * * User-space parallel port device driver (header file). * * Copyright (C) 1998-9 Tim Waugh * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. * * Added PPGETTIME/PPSETTIME, Fred Barnes, 1999 * Added PPGETMODES/PPGETMODE/PPGETPHASE, Fred Barnes , 03/01/2001 */ #define PP_IOCTL 'p' /* Set mode for read/write (e.g. IEEE1284_MODE_EPP) */ #define PPSETMODE _IOW(PP_IOCTL, 0x80, int) /* Read status */ #define PPRSTATUS _IOR(PP_IOCTL, 0x81, unsigned char) #define PPWSTATUS OBSOLETE__IOW(PP_IOCTL, 0x82, unsigned char) /* Read/write control */ #define PPRCONTROL _IOR(PP_IOCTL, 0x83, unsigned char) #define PPWCONTROL _IOW(PP_IOCTL, 0x84, unsigned char) struct ppdev_frob_struct { unsigned char mask; unsigned char val; }; #define PPFCONTROL _IOW(PP_IOCTL, 0x8e, struct ppdev_frob_struct) /* Read/write data */ #define PPRDATA _IOR(PP_IOCTL, 0x85, unsigned char) #define PPWDATA _IOW(PP_IOCTL, 0x86, unsigned char) /* Read/write econtrol (not used) */ #define PPRECONTROL OBSOLETE__IOR(PP_IOCTL, 0x87, unsigned char) #define PPWECONTROL OBSOLETE__IOW(PP_IOCTL, 0x88, unsigned char) /* Read/write FIFO (not used) */ #define PPRFIFO OBSOLETE__IOR(PP_IOCTL, 0x89, unsigned char) #define PPWFIFO OBSOLETE__IOW(PP_IOCTL, 0x8a, unsigned char) /* Claim the port to start using it */ #define PPCLAIM _IO(PP_IOCTL, 0x8b) /* Release the port when you aren't using it */ #define PPRELEASE _IO(PP_IOCTL, 0x8c) /* Yield the port (release it if another driver is waiting, * then reclaim) */ #define PPYIELD _IO(PP_IOCTL, 0x8d) /* Register device exclusively (must be before PPCLAIM). */ #define PPEXCL _IO(PP_IOCTL, 0x8f) /* Data line direction: non-zero for input mode. */ #define PPDATADIR _IOW(PP_IOCTL, 0x90, int) /* Negotiate a particular IEEE 1284 mode. */ #define PPNEGOT _IOW(PP_IOCTL, 0x91, int) /* Set control lines when an interrupt occurs. */ #define PPWCTLONIRQ _IOW(PP_IOCTL, 0x92, unsigned char) /* Clear (and return) interrupt count. */ #define PPCLRIRQ _IOR(PP_IOCTL, 0x93, int) /* Set the IEEE 1284 phase that we're in (e.g. IEEE1284_PH_FWD_IDLE) */ #define PPSETPHASE _IOW(PP_IOCTL, 0x94, int) /* Set and get port timeout (struct timeval's) */ #define PPGETTIME _IOR(PP_IOCTL, 0x95, struct timeval) #define PPSETTIME _IOW(PP_IOCTL, 0x96, struct timeval) /* Get available modes (what the hardware can do) */ #define PPGETMODES _IOR(PP_IOCTL, 0x97, unsigned int) /* Get the current mode and phaze */ #define PPGETMODE _IOR(PP_IOCTL, 0x98, int) #define PPGETPHASE _IOR(PP_IOCTL, 0x99, int) /* get/set flags */ #define PPGETFLAGS _IOR(PP_IOCTL, 0x9a, int) #define PPSETFLAGS _IOW(PP_IOCTL, 0x9b, int) /* flags visible to the world */ #define PP_FASTWRITE (1<<2) #define PP_FASTREAD (1<<3) #define PP_W91284PIC (1<<4) /* only masks user-visible flags */ #define PP_FLAGMASK (PP_FASTWRITE | PP_FASTREAD | PP_W91284PIC) #ifndef _LINUX_TIME_H #define _LINUX_TIME_H #include #ifndef _STRUCT_TIMESPEC #define _STRUCT_TIMESPEC struct timespec { __kernel_time_t tv_sec; /* seconds */ long tv_nsec; /* nanoseconds */ }; #endif struct timeval { __kernel_time_t tv_sec; /* seconds */ __kernel_suseconds_t tv_usec; /* microseconds */ }; struct timezone { int tz_minuteswest; /* minutes west of Greenwich */ int tz_dsttime; /* type of dst correction */ }; #define NFDBITS __NFDBITS #define FD_SETSIZE __FD_SETSIZE #define FD_SET(fd,fdsetp) __FD_SET(fd,fdsetp) #define FD_CLR(fd,fdsetp) __FD_CLR(fd,fdsetp) #define FD_ISSET(fd,fdsetp) __FD_ISSET(fd,fdsetp) #define FD_ZERO(fdsetp) __FD_ZERO(fdsetp) /* * Names of the interval timers, and structure * defining a timer setting: */ #define ITIMER_REAL 0 #define ITIMER_VIRTUAL 1 #define ITIMER_PROF 2 struct itimerspec { struct timespec it_interval; /* timer period */ struct timespec it_value; /* timer expiration */ }; struct itimerval { struct timeval it_interval; /* timer interval */ struct timeval it_value; /* current value */ }; /* * The IDs of the various system clocks (for POSIX.1b interval timers): */ #define CLOCK_REALTIME 0 #define CLOCK_MONOTONIC 1 #define CLOCK_PROCESS_CPUTIME_ID 2 #define CLOCK_THREAD_CPUTIME_ID 3 #define CLOCK_MONOTONIC_RAW 4 #define CLOCK_REALTIME_COARSE 5 #define CLOCK_MONOTONIC_COARSE 6 /* * The IDs of various hardware clocks: */ #define CLOCK_SGI_CYCLE 10 #define MAX_CLOCKS 16 #define CLOCKS_MASK (CLOCK_REALTIME | CLOCK_MONOTONIC) #define CLOCKS_MONO CLOCK_MONOTONIC /* * The various flags for setting POSIX.1b interval timers: */ #define TIMER_ABSTIME 0x01 #endif #ifndef __LINUX_NETFILTER_H #define __LINUX_NETFILTER_H #include /* Responses from hook functions. */ #define NF_DROP 0 #define NF_ACCEPT 1 #define NF_STOLEN 2 #define NF_QUEUE 3 #define NF_REPEAT 4 #define NF_STOP 5 #define NF_MAX_VERDICT NF_STOP /* we overload the higher bits for encoding auxiliary data such as the queue * number. Not nice, but better than additional function arguments. */ #define NF_VERDICT_MASK 0x0000ffff #define NF_VERDICT_BITS 16 #define NF_VERDICT_QMASK 0xffff0000 #define NF_VERDICT_QBITS 16 #define NF_QUEUE_NR(x) ((((x) << NF_VERDICT_BITS) & NF_VERDICT_QMASK) | NF_QUEUE) /* only for userspace compatibility */ /* Generic cache responses from hook functions. <= 0x2000 is used for protocol-flags. */ #define NFC_UNKNOWN 0x4000 #define NFC_ALTERED 0x8000 enum nf_inet_hooks { NF_INET_PRE_ROUTING, NF_INET_LOCAL_IN, NF_INET_FORWARD, NF_INET_LOCAL_OUT, NF_INET_POST_ROUTING, NF_INET_NUMHOOKS }; enum { NFPROTO_UNSPEC = 0, NFPROTO_IPV4 = 2, NFPROTO_ARP = 3, NFPROTO_BRIDGE = 7, NFPROTO_IPV6 = 10, NFPROTO_DECNET = 12, NFPROTO_NUMPROTO, }; union nf_inet_addr { __u32 all[4]; __be32 ip; __be32 ip6[4]; struct in_addr in; struct in6_addr in6; }; #endif /*__LINUX_NETFILTER_H*/ #ifndef FADVISE_H_INCLUDED #define FADVISE_H_INCLUDED #define POSIX_FADV_NORMAL 0 /* No further special treatment. */ #define POSIX_FADV_RANDOM 1 /* Expect random page references. */ #define POSIX_FADV_SEQUENTIAL 2 /* Expect sequential page references. */ #define POSIX_FADV_WILLNEED 3 /* Will need these pages. */ /* * The advise values for POSIX_FADV_DONTNEED and POSIX_ADV_NOREUSE * for s390-64 differ from the values for the rest of the world. */ #if defined(__s390x__) #define POSIX_FADV_DONTNEED 6 /* Don't need these pages. */ #define POSIX_FADV_NOREUSE 7 /* Data will be accessed once. */ #else #define POSIX_FADV_DONTNEED 4 /* Don't need these pages. */ #define POSIX_FADV_NOREUSE 5 /* Data will be accessed once. */ #endif #endif /* FADVISE_H_INCLUDED */ /* $Revision: 3.0 $$Date: 1998/11/02 14:20:59 $ * linux/include/linux/cyclades.h * * This file was initially written by * Randolph Bentson and is maintained by * Ivan Passos . * * This file contains the general definitions for the cyclades.c driver *$Log: cyclades.h,v $ *Revision 3.1 2002/01/29 11:36:16 henrique *added throttle field on struct cyclades_port to indicate whether the *port is throttled or not * *Revision 3.1 2000/04/19 18:52:52 ivan *converted address fields to unsigned long and added fields for physical *addresses on cyclades_card structure; * *Revision 3.0 1998/11/02 14:20:59 ivan *added nports field on cyclades_card structure; * *Revision 2.5 1998/08/03 16:57:01 ivan *added cyclades_idle_stats structure; * *Revision 2.4 1998/06/01 12:09:53 ivan *removed closing_wait2 from cyclades_port structure; * *Revision 2.3 1998/03/16 18:01:12 ivan *changes in the cyclades_port structure to get it closer to the *standard serial port structure; *added constants for new ioctls; * *Revision 2.2 1998/02/17 16:50:00 ivan *changes in the cyclades_port structure (addition of shutdown_wait and *chip_rev variables); *added constants for new ioctls and for CD1400 rev. numbers. * *Revision 2.1 1997/10/24 16:03:00 ivan *added rflow (which allows enabling the CD1400 special flow control *feature) and rtsdtr_inv (which allows DTR/RTS pin inversion) to *cyclades_port structure; *added Alpha support * *Revision 2.0 1997/06/30 10:30:00 ivan *added some new doorbell command constants related to IOCTLW and *UART error signaling * *Revision 1.8 1997/06/03 15:30:00 ivan *added constant ZFIRM_HLT *added constant CyPCI_Ze_win ( = 2 * Cy_PCI_Zwin) * *Revision 1.7 1997/03/26 10:30:00 daniel *new entries at the end of cyclades_port struct to reallocate *variables illegally allocated within card memory. * *Revision 1.6 1996/09/09 18:35:30 bentson *fold in changes for Cyclom-Z -- including structures for *communicating with board as well modest changes to original *structures to support new features. * *Revision 1.5 1995/11/13 21:13:31 bentson *changes suggested by Michael Chastain *to support use of this file in non-kernel applications * * */ #ifndef _LINUX_CYCLADES_H #define _LINUX_CYCLADES_H #include struct cyclades_monitor { unsigned long int_count; unsigned long char_count; unsigned long char_max; unsigned long char_last; }; /* * These stats all reflect activity since the device was last initialized. * (i.e., since the port was opened with no other processes already having it * open) */ struct cyclades_idle_stats { __kernel_time_t in_use; /* Time device has been in use (secs) */ __kernel_time_t recv_idle; /* Time since last char received (secs) */ __kernel_time_t xmit_idle; /* Time since last char transmitted (secs) */ unsigned long recv_bytes; /* Bytes received */ unsigned long xmit_bytes; /* Bytes transmitted */ unsigned long overruns; /* Input overruns */ unsigned long frame_errs; /* Input framing errors */ unsigned long parity_errs; /* Input parity errors */ }; #define CYCLADES_MAGIC 0x4359 #define CYGETMON 0x435901 #define CYGETTHRESH 0x435902 #define CYSETTHRESH 0x435903 #define CYGETDEFTHRESH 0x435904 #define CYSETDEFTHRESH 0x435905 #define CYGETTIMEOUT 0x435906 #define CYSETTIMEOUT 0x435907 #define CYGETDEFTIMEOUT 0x435908 #define CYSETDEFTIMEOUT 0x435909 #define CYSETRFLOW 0x43590a #define CYGETRFLOW 0x43590b #define CYSETRTSDTR_INV 0x43590c #define CYGETRTSDTR_INV 0x43590d #define CYZSETPOLLCYCLE 0x43590e #define CYZGETPOLLCYCLE 0x43590f #define CYGETCD1400VER 0x435910 #define CYSETWAIT 0x435912 #define CYGETWAIT 0x435913 /*************** CYCLOM-Z ADDITIONS ***************/ #define CZIOC ('M' << 8) #define CZ_NBOARDS (CZIOC|0xfa) #define CZ_BOOT_START (CZIOC|0xfb) #define CZ_BOOT_DATA (CZIOC|0xfc) #define CZ_BOOT_END (CZIOC|0xfd) #define CZ_TEST (CZIOC|0xfe) #define CZ_DEF_POLL (HZ/25) #define MAX_BOARD 4 /* Max number of boards */ #define MAX_DEV 256 /* Max number of ports total */ #define CYZ_MAX_SPEED 921600 #define CYZ_FIFO_SIZE 16 #define CYZ_BOOT_NWORDS 0x100 struct CYZ_BOOT_CTRL { unsigned short nboard; int status[MAX_BOARD]; int nchannel[MAX_BOARD]; int fw_rev[MAX_BOARD]; unsigned long offset; unsigned long data[CYZ_BOOT_NWORDS]; }; #ifndef DP_WINDOW_SIZE /* * Memory Window Sizes */ #define DP_WINDOW_SIZE (0x00080000) /* window size 512 Kb */ #define ZE_DP_WINDOW_SIZE (0x00100000) /* window size 1 Mb (Ze and 8Zo V.2 */ #define CTRL_WINDOW_SIZE (0x00000080) /* runtime regs 128 bytes */ /* * CUSTOM_REG - Cyclom-Z/PCI Custom Registers Set. The driver * normally will access only interested on the fpga_id, fpga_version, * start_cpu and stop_cpu. */ struct CUSTOM_REG { __u32 fpga_id; /* FPGA Identification Register */ __u32 fpga_version; /* FPGA Version Number Register */ __u32 cpu_start; /* CPU start Register (write) */ __u32 cpu_stop; /* CPU stop Register (write) */ __u32 misc_reg; /* Miscellaneous Register */ __u32 idt_mode; /* IDT mode Register */ __u32 uart_irq_status; /* UART IRQ status Register */ __u32 clear_timer0_irq; /* Clear timer interrupt Register */ __u32 clear_timer1_irq; /* Clear timer interrupt Register */ __u32 clear_timer2_irq; /* Clear timer interrupt Register */ __u32 test_register; /* Test Register */ __u32 test_count; /* Test Count Register */ __u32 timer_select; /* Timer select register */ __u32 pr_uart_irq_status; /* Prioritized UART IRQ stat Reg */ __u32 ram_wait_state; /* RAM wait-state Register */ __u32 uart_wait_state; /* UART wait-state Register */ __u32 timer_wait_state; /* timer wait-state Register */ __u32 ack_wait_state; /* ACK wait State Register */ }; /* * RUNTIME_9060 - PLX PCI9060ES local configuration and shared runtime * registers. This structure can be used to access the 9060 registers * (memory mapped). */ struct RUNTIME_9060 { __u32 loc_addr_range; /* 00h - Local Address Range */ __u32 loc_addr_base; /* 04h - Local Address Base */ __u32 loc_arbitr; /* 08h - Local Arbitration */ __u32 endian_descr; /* 0Ch - Big/Little Endian Descriptor */ __u32 loc_rom_range; /* 10h - Local ROM Range */ __u32 loc_rom_base; /* 14h - Local ROM Base */ __u32 loc_bus_descr; /* 18h - Local Bus descriptor */ __u32 loc_range_mst; /* 1Ch - Local Range for Master to PCI */ __u32 loc_base_mst; /* 20h - Local Base for Master PCI */ __u32 loc_range_io; /* 24h - Local Range for Master IO */ __u32 pci_base_mst; /* 28h - PCI Base for Master PCI */ __u32 pci_conf_io; /* 2Ch - PCI configuration for Master IO */ __u32 filler1; /* 30h */ __u32 filler2; /* 34h */ __u32 filler3; /* 38h */ __u32 filler4; /* 3Ch */ __u32 mail_box_0; /* 40h - Mail Box 0 */ __u32 mail_box_1; /* 44h - Mail Box 1 */ __u32 mail_box_2; /* 48h - Mail Box 2 */ __u32 mail_box_3; /* 4Ch - Mail Box 3 */ __u32 filler5; /* 50h */ __u32 filler6; /* 54h */ __u32 filler7; /* 58h */ __u32 filler8; /* 5Ch */ __u32 pci_doorbell; /* 60h - PCI to Local Doorbell */ __u32 loc_doorbell; /* 64h - Local to PCI Doorbell */ __u32 intr_ctrl_stat; /* 68h - Interrupt Control/Status */ __u32 init_ctrl; /* 6Ch - EEPROM control, Init Control, etc */ }; /* Values for the Local Base Address re-map register */ #define WIN_RAM 0x00000001L /* set the sliding window to RAM */ #define WIN_CREG 0x14000001L /* set the window to custom Registers */ /* Values timer select registers */ #define TIMER_BY_1M 0x00 /* clock divided by 1M */ #define TIMER_BY_256K 0x01 /* clock divided by 256k */ #define TIMER_BY_128K 0x02 /* clock divided by 128k */ #define TIMER_BY_32K 0x03 /* clock divided by 32k */ /****************** ****************** *******************/ #endif #ifndef ZFIRM_ID /* #include "zfwint.h" */ /****************** ****************** *******************/ /* * This file contains the definitions for interfacing with the * Cyclom-Z ZFIRM Firmware. */ /* General Constant definitions */ #define MAX_CHAN 64 /* max number of channels per board */ /* firmware id structure (set after boot) */ #define ID_ADDRESS 0x00000180L /* signature/pointer address */ #define ZFIRM_ID 0x5557465AL /* ZFIRM/U signature */ #define ZFIRM_HLT 0x59505B5CL /* ZFIRM needs external power supply */ #define ZFIRM_RST 0x56040674L /* RST signal (due to FW reset) */ #define ZF_TINACT_DEF 1000 /* default inactivity timeout (1000 ms) */ #define ZF_TINACT ZF_TINACT_DEF struct FIRM_ID { __u32 signature; /* ZFIRM/U signature */ __u32 zfwctrl_addr; /* pointer to ZFW_CTRL structure */ }; /* Op. System id */ #define C_OS_LINUX 0x00000030 /* generic Linux system */ /* channel op_mode */ #define C_CH_DISABLE 0x00000000 /* channel is disabled */ #define C_CH_TXENABLE 0x00000001 /* channel Tx enabled */ #define C_CH_RXENABLE 0x00000002 /* channel Rx enabled */ #define C_CH_ENABLE 0x00000003 /* channel Tx/Rx enabled */ #define C_CH_LOOPBACK 0x00000004 /* Loopback mode */ /* comm_parity - parity */ #define C_PR_NONE 0x00000000 /* None */ #define C_PR_ODD 0x00000001 /* Odd */ #define C_PR_EVEN 0x00000002 /* Even */ #define C_PR_MARK 0x00000004 /* Mark */ #define C_PR_SPACE 0x00000008 /* Space */ #define C_PR_PARITY 0x000000ff #define C_PR_DISCARD 0x00000100 /* discard char with frame/par error */ #define C_PR_IGNORE 0x00000200 /* ignore frame/par error */ /* comm_data_l - data length and stop bits */ #define C_DL_CS5 0x00000001 #define C_DL_CS6 0x00000002 #define C_DL_CS7 0x00000004 #define C_DL_CS8 0x00000008 #define C_DL_CS 0x0000000f #define C_DL_1STOP 0x00000010 #define C_DL_15STOP 0x00000020 #define C_DL_2STOP 0x00000040 #define C_DL_STOP 0x000000f0 /* interrupt enabling/status */ #define C_IN_DISABLE 0x00000000 /* zero, disable interrupts */ #define C_IN_TXBEMPTY 0x00000001 /* tx buffer empty */ #define C_IN_TXLOWWM 0x00000002 /* tx buffer below LWM */ #define C_IN_RXHIWM 0x00000010 /* rx buffer above HWM */ #define C_IN_RXNNDT 0x00000020 /* rx no new data timeout */ #define C_IN_MDCD 0x00000100 /* modem DCD change */ #define C_IN_MDSR 0x00000200 /* modem DSR change */ #define C_IN_MRI 0x00000400 /* modem RI change */ #define C_IN_MCTS 0x00000800 /* modem CTS change */ #define C_IN_RXBRK 0x00001000 /* Break received */ #define C_IN_PR_ERROR 0x00002000 /* parity error */ #define C_IN_FR_ERROR 0x00004000 /* frame error */ #define C_IN_OVR_ERROR 0x00008000 /* overrun error */ #define C_IN_RXOFL 0x00010000 /* RX buffer overflow */ #define C_IN_IOCTLW 0x00020000 /* I/O control w/ wait */ #define C_IN_MRTS 0x00040000 /* modem RTS drop */ #define C_IN_ICHAR 0x00080000 /* flow control */ #define C_FL_OXX 0x00000001 /* output Xon/Xoff flow control */ #define C_FL_IXX 0x00000002 /* output Xon/Xoff flow control */ #define C_FL_OIXANY 0x00000004 /* output Xon/Xoff (any xon) */ #define C_FL_SWFLOW 0x0000000f /* flow status */ #define C_FS_TXIDLE 0x00000000 /* no Tx data in the buffer or UART */ #define C_FS_SENDING 0x00000001 /* UART is sending data */ #define C_FS_SWFLOW 0x00000002 /* Tx is stopped by received Xoff */ /* rs_control/rs_status RS-232 signals */ #define C_RS_PARAM 0x80000000 /* Indicates presence of parameter in IOCTLM command */ #define C_RS_RTS 0x00000001 /* RTS */ #define C_RS_DTR 0x00000004 /* DTR */ #define C_RS_DCD 0x00000100 /* CD */ #define C_RS_DSR 0x00000200 /* DSR */ #define C_RS_RI 0x00000400 /* RI */ #define C_RS_CTS 0x00000800 /* CTS */ /* commands Host <-> Board */ #define C_CM_RESET 0x01 /* reset/flush buffers */ #define C_CM_IOCTL 0x02 /* re-read CH_CTRL */ #define C_CM_IOCTLW 0x03 /* re-read CH_CTRL, intr when done */ #define C_CM_IOCTLM 0x04 /* RS-232 outputs change */ #define C_CM_SENDXOFF 0x10 /* send Xoff */ #define C_CM_SENDXON 0x11 /* send Xon */ #define C_CM_CLFLOW 0x12 /* Clear flow control (resume) */ #define C_ïÚðÚñÚòÚóÚCM_SENDBRK 0x41 /* send break */ #define C_CM_INTBACK 0x42 /* Interrupt back */ #define C_CM_SET_BREAK 0x43 /* Tx break on */ #define C_CM_CLR_BREAK 0x44 /* Tx break off */ #define C_CM_CMD_DONE 0x45 /* Previous command done */ #define C_CM_INTBACK2 0x46 /* Alternate Interrupt back */ #define C_CM_TINACT 0x51 /* set inactivity detection */ #define C_CM_IRQ_ENBL 0x52 /* enable generation of interrupts */ #define C_CM_IRQ_DSBL 0x53 /* disable generation of interrupts */ #define C_CM_ACK_ENBL 0x54 /* enable acknowledged interrupt mode */ #define C_CM_ACK_DSBL 0x55 /* disable acknowledged intr mode */ #define C_CM_FLUSH_RX 0x56 /* flushes Rx buffer */ #define C_CM_FLUSH_TX 0x57 /* flushes Tx buffer */ #define C_CM_Q_ENABLE 0x58 /* enables queue access from the driver */ #define C_CM_Q_DISABLE 0x59 /* disables queue access from the driver */ #define C_CM_TXBEMPTY 0x60 /* Tx buffer is empty */ #define C_CM_TXLOWWM 0x61 /* Tx buffer low water mark */ #define C_CM_RXHIWM 0x62 /* Rx buffer high water mark */ #define C_CM_RXNNDT 0x63 /* rx no new data timeout */ #define C_CM_TXFEMPTY 0x64 #define C_CM_ICHAR 0x65 #define C_CM_MDCD 0x70 /* modem DCD change */ #define C_CM_MDSR 0x71 /* modem DSR change */ #define C_CM_MRI 0x72 /* modem RI change */ #define C_CM_MCTS 0x73 /* modem CTS change */ #define C_CM_MRTS 0x74 /* modem RTS drop */ #define C_CM_RXBRK 0x84 /* Break received */ #define C_CM_PR_ERROR 0x85 /* Parity error */ #define C_CM_FR_ERROR 0x86 /* Frame error */ #define C_CM_OVR_ERROR 0x87 /* Overrun error */ #define C_CM_RXOFL 0x88 /* RX buffer overflow */ #define C_CM_CMDERROR 0x90 /* command error */ #define C_CM_FATAL 0x91 /* fatal error */ #define C_CM_HW_RESET 0x92 /* reset board */ /* * CH_CTRL - This per port structure contains all parameters * that control an specific port. It can be seen as the * configuration registers of a "super-serial-controller". */ struct CH_CTRL { __u32 op_mode; /* operation mode */ __u32 intr_enable; /* interrupt masking */ __u32 sw_flow; /* SW flow control */ __u32 flow_status; /* output flow status */ __u32 comm_baud; /* baud rate - numerically specified */ __u32 comm_parity; /* parity */ __u32 comm_data_l; /* data length/stop */ __u32 comm_flags; /* other flags */ __u32 hw_flow; /* HW flow control */ __u32 rs_control; /* RS-232 outputs */ __u32 rs_status; /* RS-232 inputs */ __u32 flow_xon; /* xon char */ __u32 flow_xoff; /* xoff char */ __u32 hw_overflow; /* hw overflow counter */ __u32 sw_overflow; /* sw overflow counter */ __u32 comm_error; /* frame/parity error counter */ __u32 ichar; __u32 filler[7]; }; /* * BUF_CTRL - This per channel structure contains * all Tx and Rx buffer control for a given channel. */ struct BUF_CTRL { __u32 flag_dma; /* buffers are in Host memory */ __u32 tx_bufaddr; /* address of the tx buffer */ __u32 tx_bufsize; /* tx buffer size */ __u32 tx_threshold; /* tx low water mark */ __u32 tx_get; /* tail index tx buf */ __u32 tx_put; /* head index tx buf */ __u32 rx_bufaddr; /* address of the rx buffer */ __u32 rx_bufsize; /* rx buffer size */ __u32 rx_threshold; /* rx high water mark */ __u32 rx_get; /* tail index rx buf */ __u32 rx_put; /* head index rx buf */ __u32 filler[5]; /* filler to align structures */ }; /* * BOARD_CTRL - This per board structure contains all global * control fields related to the board. */ struct BOARD_CTRL { /* static info provided by the on-board CPU */ __u32 n_channel; /* number of channels */ __u32 fw_version; /* firmware version */ /* static info provided by the driver */ __u32 op_system; /* op_system id */ __u32 dr_version; /* driver version */ /* board control area */ __u32 inactivity; /* inactivity control */ /* host to FW commands */ __u32 hcmd_channel; /* channel number */ __u32 hcmd_param; /* pointer to parameters */ /* FW to Host commands */ __u32 fwcmd_channel; /* channel number */ __u32 fwcmd_param; /* pointer to parameters */ __u32 zf_int_queue_addr; /* offset for INT_QUEUE structure */ /* filler so the structures are aligned */ __u32 filler[6]; }; /* Host Interrupt Queue */ #define QUEUE_SIZE (10*MAX_CHAN) struct INT_QUEUE { unsigned char intr_code[QUEUE_SIZE]; unsigned long channel[QUEUE_SIZE]; unsigned long param[QUEUE_SIZE]; unsigned long put; unsigned long get; }; /* * ZFW_CTRL - This is the data structure that includes all other * data structures used by the Firmware. */ struct ZFW_CTRL { struct BOARD_CTRL board_ctrl; struct CH_CTRL ch_ctrl[MAX_CHAN]; struct BUF_CTRL buf_ctrl[MAX_CHAN]; }; /****************** ****************** *******************/ #endif #endif /* _LINUX_CYCLADES_H */ /* * BSD Process Accounting for Linux - Definitions * * Author: Marco van Wieringen (mvw@planets.elm.net) * * This header file contains the definitions needed to implement * BSD-style process accounting. The kernel accounting code and all * user-level programs that try to do something useful with the * process accounting log must include this file. * * Copyright (C) 1995 - 1997 Marco van Wieringen - ELM Consultancy B.V. * */ #ifndef _LINUX_ACCT_H #define _LINUX_ACCT_H #include #include #include /* * comp_t is a 16-bit "floating" point number with a 3-bit base 8 * exponent and a 13-bit fraction. * comp2_t is 24-bit with 5-bit base 2 exponent and 20 bit fraction * (leading 1 not stored). * See linux/kernel/acct.c for the specific encoding systems used. */ typedef __u16 comp_t; typedef __u32 comp2_t; /* * accounting file record * * This structure contains all of the information written out to the * process accounting file whenever a process exits. */ #define ACCT_COMM 16 struct acct { char ac_flag; /* Flags */ char ac_version; /* Always set to ACCT_VERSION */ /* for binary compatibility back until 2.0 */ __u16 ac_uid16; /* LSB of Real User ID */ __u16 ac_gid16; /* LSB of Real Group ID */ __u16 ac_tty; /* Control Terminal */ __u32 ac_btime; /* Process Creation Time */ comp_t ac_utime; /* User Time */ comp_t ac_stime; /* System Time */ comp_t ac_etime; /* Elapsed Time */ comp_t ac_mem; /* Average Memory Usage */ comp_t ac_io; /* Chars Transferred */ comp_t ac_rw; /* Blocks Read or Written */ comp_t ac_minflt; /* Minor Pagefaults */ comp_t ac_majflt; /* Major Pagefaults */ comp_t ac_swaps; /* Number of Swaps */ /* m68k had no padding here. */ __u16 ac_ahz; /* AHZ */ __u32 ac_exitcode; /* Exitcode */ char ac_comm[ACCT_COMM + 1]; /* Command Name */ __u8 ac_etime_hi; /* Elapsed Time MSB */ __u16 ac_etime_lo; /* Elapsed Time LSB */ __u32 ac_uid; /* Real User ID */ __u32 ac_gid; /* Real Group ID */ }; struct acct_v3 { char ac_flag; /* Flags */ char ac_version; /* Always set to ACCT_VERSION */ __u16 ac_tty; /* Control Terminal */ __u32 ac_exitcode; /* Exitcode */ __u32 ac_uid; /* Real User ID */ __u32 ac_gid; /* Real Group ID */ __u32 ac_pid; /* Process ID */ __u32 ac_ppid; /* Parent Process ID */ __u32 ac_btime; /* Process Creation Time */ float ac_etime; /* Elapsed Time */ comp_t ac_utime; /* User Time */ comp_t ac_stime; /* System Time */ comp_t ac_mem; /* Average Memory Usage */ comp_t ac_io; /* Chars Transferred */ comp_t ac_rw; /* Blocks Read or Written */ comp_t ac_minflt; /* Minor Pagefaults */ comp_t ac_majflt; /* Major Pagefaults */ comp_t ac_swaps; /* Number of Swaps */ char ac_comm[ACCT_COMM]; /* Command Name */ }; /* * accounting flags */ /* bit set when the process ... */ #define AFORK 0x01 /* ... executed fork, but did not exec */ #define ASU 0x02 /* ... used super-user privileges */ #define ACOMPAT 0x04 /* ... used compatibility mode (VAX only not used) */ #define ACORE 0x08 /* ... dumped core */ #define AXSIG 0x10 /* ... was killed by a signal */ #ifdef __BIG_ENDIAN #define ACCT_BYTEORDER 0x80 /* accounting file is big endian */ #else #define ACCT_BYTEORDER 0x00 /* accounting file is little endian */ #endif #define ACCT_VERSION 2 #define AHZ (HZ) #endif /* _LINUX_ACCT_H */ , .ñ* .. , ipt_LOG.h!, ipt_ECN.h",ipt_CLUSTERIP.h#, ..install.cmd$,.install%, ip_queue.h&, ipt_REJECT.h', ipt_ecn.h(, ipt_ULOG.h), ipt_TTL.h*,ipt_ah.h+, ip_tables.h,, ipt_ttl.h-,ipt_addrtype.h., ipt_realm.h/,¸ ipt_SAME.h#ifndef _IPT_LOG_H #define _IPT_LOG_H /* make sure not to change this without changing netfilter.h:NF_LOG_* (!) */ #define IPT_LOG_TCPSEQ 0x01 /* Log TCP sequence numbers */ #define IPT_LOG_TCPOPT 0x02 /* Log TCP options */ #define IPT_LOG_IPOPT 0x04 /* Log IP options */ #define IPT_LOG_UID 0x08 /* Log UID owning local socket */ #define IPT_LOG_NFLOG 0x10 /* Unsupported, don't reuse */ #define IPT_LOG_MACDECODE 0x20 /* Decode MAC header */ #define IPT_LOG_MASK 0x2f struct ipt_log_info { unsigned char level; unsigned char logflags; char prefix[30]; }; #endif /*_IPT_LOG_H*/ /* Header file for iptables ipt_ECN target * * (C) 2002 by Harald Welte * * This software is distributed under GNU GPL v2, 1991 * * ipt_ECN.h,v 1.3 2002/05/29 12:17:40 laforge Exp */ #ifndef _IPT_ECN_TARGET_H #define _IPT_ECN_TARGET_H #include #define IPT_ECN_IP_MASK (~XT_DSCP_MASK) #define IPT_ECN_OP_SET_IP 0x01 /* set ECN bits of IPv4 header */ #define IPT_ECN_OP_SET_ECE 0x10 /* set ECE bit of TCP header */ #define IPT_ECN_OP_SET_CWR 0x20 /* set CWR bit of TCP header */ #define IPT_ECN_OP_MASK 0xce struct ipt_ECN_info { u_int8_t operation; /* bitset of operations */ u_int8_t ip_ect; /* ECT codepoint of IPv4 header, pre-shifted */ union { struct { u_int8_t ece:1, cwr:1; /* TCP ECT bits */ } tcp; } proto; }; #endif /* _IPT_ECN_TARGET_H */ #ifndef _IPT_CLUSTERIP_H_target #define _IPT_CLUSTERIP_H_target enum clusterip_hashmode { CLUSTERIP_HASHMODE_SIP = 0, CLUSTERIP_HASHMODE_SIP_SPT, CLUSTERIP_HASHMODE_SIP_SPT_DPT, }; #define CLUSTERIP_HASHMODE_MAX CLUSTERIP_HASHMODE_SIP_SPT_DPT #define CLUSTERIP_MAX_NODES 16 #define CLUSTERIP_FLAG_NEW 0x00000001 struct clusterip_config; struct ipt_clusterip_tgt_info { u_int32_t flags; /* only relevant for new ones */ u_int8_t clustermac[6]; u_int16_t num_total_nodes; u_int16_t num_local_nodes; u_int16_t local_nodes[CLUSTERIP_MAX_NODES]; u_int32_t hash_mode; u_int32_t hash_initval; /* Used internally by the kernel */ struct clusterip_config *config; }; #endif /*_IPT_CLUSTERIP_H_target*/ cmd_/usr/local/home/bellard/cpux86/rootdisk/buildroot-2011.02/output/toolchain/linux/include/linux/netfilter_ipv4/.install := perl scripts/headers_install.pl /usr/local/home/bellard/cpux86/rootdisk/buildroot-2011.02/output/toolchain/linux-2.6.37.2/include/linux/netfilter_ipv4 /usr/local/home/bellard/cpux86/rootdisk/buildroot-2011.02/output/toolchain/linux/include/linux/netfilter_ipv4 x86 ip_queue.h ip_tables.h ipt_CLUSTERIP.h ipt_ECN.h ipt_LOG.h ipt_REJECT.h ipt_SAME.h ipt_TTL.h ipt_ULOG.h ipt_addrtype.h ipt_ah.h ipt_ecn.h ipt_realm.h ipt_ttl.h; perl scripts/headers_install.pl /usr/local/home/bellard/cpux86/rootdisk/buildroot-2011.02/output/toolchain/linux-2.6.37.2/include/linux/netfilter_ipv4 /usr/local/home/bellard/cpux86/rootdisk/buildroot-2011.02/output/toolchain/linux/include/linux/netfilter_ipv4 x86 ; touch /usr/local/home/bellard/cpux86/rootdisk/buildroot-2011.02/output/toolchain/linux/include/linux/netfilter_ipv4/.install /* * This is a module which is used for queueing IPv4 packets and * communicating with userspace via netlink. * * (C) 2000 James Morris, this code is GPL. */ #ifndef _IP_QUEUE_H #define _IP_QUEUE_H #include /* Messages sent from kernel */ typedef struct ipq_packet_msg { unsigned long packet_id; /* ID of queued packet */ unsigned long mark; /* Netfilter mark value */ long timestamp_sec; /* Packet arrival time (seconds) */ long timestamp_usec; /* Packet arrvial time (+useconds) */ unsigned int hook; /* Netfilter hook we rode in on */ char indev_name[IFNAMSIZ]; /* Name of incoming interface */ char outdev_name[IFNAMSIZ]; /* Name of outgoing interface */ __be16 hw_protocol; /* Hardware protocol (network order) */ unsigned short hw_type; /* Hardware type */ unsigned char hw_addrlen; /* Hardware address length */ unsigned char hw_addr[8]; /* Hardware address */ size_t data_len; /* Length of packet data */ unsigned char payload[0]; /* Optional packet data */ } ipq_packet_msg_t; /* Messages sent from userspace */ typedef struct ipq_mode_msg { unsigned char value; /* Requested mode */ size_t range; /* Optional range of packet requested */ } ipq_mode_msg_t; typedef struct ipq_verdict_msg { unsigned int value; /* Verdict to hand to netfilter */ unsigned long id; /* Packet ID for this verdict */ size_t data_len; /* Length of replacement data */ unsigned char payload[0]; /* Optional replacement packet */ } ipq_verdict_msg_t; typedef struct ipq_peer_msg { union { ipq_verdict_msg_t verdict; ipq_mode_msg_t mode; } msg; } ipq_peer_msg_t; /* Packet delivery modes */ enum { IPQ_COPY_NONE, /* Initial mode, packets are dropped */ IPQ_COPY_META, /* Copy metadata */ IPQ_COPY_PACKET /* Copy metadata + packet (range) */ }; #define IPQ_COPY_MAX IPQ_COPY_PACKET /* Types of messages */ #define IPQM_BASE 0x10 /* standard netlink messages below this */ #define IPQM_MODE (IPQM_BASE + 1) /* Mode request from peer */ #define IPQM_VERDICT (IPQM_BASE + 2) /* Verdict from peer */ #define IPQM_PACKET (IPQM_BASE + 3) /* Packet from kernel */ #define IPQM_MAX (IPQM_BASE + 4) #endif /*_IP_QUEUE_H*/