16x4_t vreinterpret_p16_s8 (int8x8_t) * poly16x4_t vreinterpret_p16_u64 (uint64x1_t) * poly16x4_t vreinterpret_p16_s64 (int64x1_t) * poly16x4_t vreinterpret_p16_f32 (float32x2_t) * poly16x4_t vreinterpret_p16_p8 (poly8x8_t) * poly16x8_t vreinterpretq_p16_u32 (uint32x4_t) * poly16x8_t vreinterpretq_p16_u16 (uint16x8_t) * poly16x8_t vreinterpretq_p16_u8 (uint8x16_t) * poly16x8_t vreinterpretq_p16_s32 (int32x4_t) * poly16x8_t vreinterpretq_p16_s16 (int16x8_t) * poly16x8_t vreinterpretq_p16_s8 (int8x16_t) * poly16x8_t vreinterpretq_p16_u64 (uint64x2_t) * poly16x8_t vreinterpretq_p16_s64 (int64x2_t) * poly16x8_t vreinterpretq_p16_f32 (float32x4_t) * poly16x8_t vreinterpretq_p16_p8 (poly8x16_t) * float32x2_t vreinterpret_f32_u32 (uint32x2_t) * float32x2_t vreinterpret_f32_u16 (uint16x4_t) * float32x2_t vreinterpret_f32_u8 (uint8x8_t) * float32x2_t vreinterpret_f32_s32 (int32x2_t) * float32x2_t vreinterpret_f32_s16 (int16x4_t) * float32x2_t vreinterpret_f32_s8 (int8x8_t) * float32x2_t vreinterpret_f32_u64 (uint64x1_t) * float32x2_t vreinterpret_f32_s64 (int64x1_t) * float32x2_t vreinterpret_f32_p16 (poly16x4_t) * float32x2_t vreinterpret_f32_p8 (poly8x8_t) * float32x4_t vreinterpretq_f32_u32 (uint32x4_t) * float32x4_t vreinterpretq_f32_u16 (uint16x8_t) * float32x4_t vreinterpretq_f32_u8 (uint8x16_t) * float32x4_t vreinterpretq_f32_s32 (int32x4_t) * float32x4_t vreinterpretq_f32_s16 (int16x8_t) * float32x4_t vreinterpretq_f32_s8 (int8x16_t) * float32x4_t vreinterpretq_f32_u64 (uint64x2_t) * float32x4_t vreinterpretq_f32_s64 (int64x2_t) * float32x4_t vreinterpretq_f32_p16 (poly16x8_t) * float32x4_t vreinterpretq_f32_p8 (poly8x16_t) * int64x1_t vreinterpret_s64_u32 (uint32x2_t) * int64x1_t vreinterpret_s64_u16 (uint16x4_t) * int64x1_t vreinterpret_s64_u8 (uint8x8_t) * int64x1_t vreinterpret_s64_s32 (int32x2_t) * int64x1_t vreinterpret_s64_s16 (int16x4_t) * int64x1_t vreinterpret_s64_s8 (int8x8_t) * int64x1_t vreinterpret_s64_u64 (uint64x1_t) * int64x1_t vreinterpret_s64_f32 (float32x2_t) * int64x1_t vreinterpret_s64_p16 (poly16x4_t) * int64x1_t vreinterpret_s64_p8 (poly8x8_t) * int64x2_t vreinterpretq_s64_u32 (uint32x4_t) * int64x2_t vreinterpretq_s64_u16 (uint16x8_t) * int64x2_t vreinterpretq_s64_u8 (uint8x16_t) * int64x2_t vreinterpretq_s64_s32 (int32x4_t) * int64x2_t vreinterpretq_s64_s16 (int16x8_t) * int64x2_t vreinterpretq_s64_s8 (int8x16_t) * int64x2_t vreinterpretq_s64_u64 (uint64x2_t) * int64x2_t vreinterpretq_s64_f32 (float32x4_t) * int64x2_t vreinterpretq_s64_p16 (poly16x8_t) * int64x2_t vreinterpretq_s64_p8 (poly8x16_t) * uint64x1_t vreinterpret_u64_u32 (uint32x2_t) * uint64x1_t vreinterpret_u64_u16 (uint16x4_t) * uint64x1_t vreinterpret_u64_u8 (uint8x8_t) * uint64x1_t vreinterpret_u64_s32 (int32x2_t) * uint64x1_t vreinterpret_u64_s16 (int16x4_t) * uint64x1_t vreinterpret_u64_s8 (int8x8_t) * uint64x1_t vreinterpret_u64_s64 (int64x1_t) * uint64x1_t vreinterpret_u64_f32 (float32x2_t) * uint64x1_t vreinterpret_u64_p16 (poly16x4_t) * uint64x1_t vreinterpret_u64_p8 (poly8x8_t) * uint64x2_t vreinterpretq_u64_u32 (uint32x4_t) * uint64x2_t vreinterpretq_u64_u16 (uint16x8_t) * uint64x2_t vreinterpretq_u64_u8 (uint8x16_t) * uint64x2_t vreinterpretq_u64_s32 (int32x4_t) * uint64x2_t vreinterpretq_u64_s16 (int16x8_t) * uint64x2_t vreinterpretq_u64_s8 (int8x16_t) * uint64x2_t vreinterpretq_u64_s64 (int64x2_t) * uint64x2_t vreinterpretq_u64_f32 (float32x4_t) * uint64x2_t vreinterpretq_u64_p16 (poly16x8_t) * uint64x2_t vreinterpretq_u64_p8 (poly8x16_t) * int8x8_t vreinterpret_s8_u32 (uint32x2_t) * int8x8_t vreinterpret_s8_u16 (uint16x4_t) * int8x8_t vreinterpret_s8_u8 (uint8x8_t) * int8x8_t vreinterpret_s8_s32 (int32x2_t) * int8x8_t vreinterpret_s8_s16 (int16x4_t) * int8x8_t vreinterpret_s8_u64 (uint64x1_t) * int8x8_t vreinterpret_s8_s64 (int64x1_t) * int8x8_t vreinterpret_s8_f32 (float32x2_t) * int8x8_t vreinterpret_s8_p16 (poly16x4_t) * int8x8_t vreinterpret_s8_p8 (poly8x8_t) * int8x16_t vreinterpretq_s8_u32 (uint32x4_t) * int8x16_t vreinterpretq_s8_u16 (uint16x8_t) * int8x16_t vreinterpretq_s8_u8 (uint8x16_t) * int8x16_t vreinterpretq_s8_s32 (int32x4_t) * int8x16_t vreinterpretq_s8_s16 (int16x8_t) * int8x16_t vreinterpretq_s8_u64 (uint64x2_t) * int8x16_t vreinterpretq_s8_s64 (int64x2_t) * int8x16_t vreinterpretq_s8_f32 (float32x4_t) * int8x16_t vreinterpretq_s8_p16 (poly16x8_t) * int8x16_t vreinterpretq_s8_p8 (poly8x16_t) * int16x4_t vreinterpret_s16_u32 (uint32x2_t) * int16x4_t vreinterpret_s16_u16 (uint16x4_t) * int16x4_t vreinterpret_s16_u8 (uint8x8_t) * int16x4_t vreinterpret_s16_s32 (int32x2_t) * int16x4_t vreinterpret_s16_s8 (int8x8_t) * int16x4_t vreinterpret_s16_u64 (uint64x1_t) * int16x4_t vreinterpret_s16_s64 (int64x1_t) * int16x4_t vreinterpret_s16_f32 (float32x2_t) * int16x4_t vreinterpret_s16_p16 (poly16x4_t) * int16x4_t vreinterpret_s16_p8 (poly8x8_t) * int16x8_t vreinterpretq_s16_u32 (uint32x4_t) * int16x8_t vreinterpretq_s16_u16 (uint16x8_t) * int16x8_t vreinterpretq_s16_u8 (uint8x16_t) * int16x8_t vreinterpretq_s16_s32 (int32x4_t) * int16x8_t vreinterpretq_s16_s8 (int8x16_t) * int16x8_t vreinterpretq_s16_u64 (uint64x2_t) * int16x8_t vreinterpretq_s16_s64 (int64x2_t) * int16x8_t vreinterpretq_s16_f32 (float32x4_t) * int16x8_t vreinterpretq_s16_p16 (poly16x8_t) * int16x8_t vreinterpretq_s16_p8 (poly8x16_t) * int32x2_t vreinterpret_s32_u32 (uint32x2_t) * int32x2_t vreinterpret_s32_u16 (uint16x4_t) * int32x2_t vreinterpret_s32_u8 (uint8x8_t) * int32x2_t vreinterpret_s32_s16 (int16x4_t) * int32x2_t vreinterpret_s32_s8 (int8x8_t) * int32x2_t vreinterpret_s32_u64 (uint64x1_t) * int32x2_t vreinterpret_s32_s64 (int64x1_t) * int32x2_t vreinterpret_s32_f32 (float32x2_t) * int32x2_t vreinterpret_s32_p16 (poly16x4_t) * int32x2_t vreinterpret_s32_p8 (poly8x8_t) * int32x4_t vreinterpretq_s32_u32 (uint32x4_t) * int32x4_t vreinterpretq_s32_u16 (uint16x8_t) * int32x4_t vreinterpretq_s32_u8 (uint8x16_t) * int32x4_t vreinterpretq_s32_s16 (int16x8_t) * int32x4_t vreinterpretq_s32_s8 (int8x16_t) * int32x4_t vreinterpretq_s32_u64 (uint64x2_t) * int32x4_t vreinterpretq_s32_s64 (int64x2_t) * int32x4_t vreinterpretq_s32_f32 (float32x4_t) * int32x4_t vreinterpretq_s32_p16 (poly16x8_t) * int32x4_t vreinterpretq_s32_p8 (poly8x16_t) * uint8x8_t vreinterpret_u8_u32 (uint32x2_t) * uint8x8_t vreinterpret_u8_u16 (uint16x4_t) * uint8x8_t vreinterpret_u8_s32 (int32x2_t) * uint8x8_t vreinterpret_u8_s16 (int16x4_t) * uint8x8_t vreinterpret_u8_s8 (int8x8_t) * uint8x8_t vreinterpret_u8_u64 (uint64x1_t) * uint8x8_t vreinterpret_u8_s64 (int64x1_t) * uint8x8_t vreinterpret_u8_f32 (float32x2_t) * uint8x8_t vreinterpret_u8_p16 (poly16x4_t) * uint8x8_t vreinterpret_u8_p8 (poly8x8_t) * uint8x16_t vreinterpretq_u8_u32 (uint32x4_t) * uint8x16_t vreinterpretq_u8_u16 (uint16x8_t) * uint8x16_t vreinterpretq_u8_s32 (int32x4_t) * uint8x16_t vreinterpretq_u8_s16 (int16x8_t) * uint8x16_t vreinterpretq_u8_s8 (int8x16_t) * uint8x16_t vreinterpretq_u8_u64 (uint64x2_t) * uint8x16_t vreinterpretq_u8_s64 (int64x2_t) * uint8x16_t vreinterpretq_u8_f32 (float32x4_t) * uint8x16_t vreinterpretq_u8_p16 (poly16x8_t) * uint8x16_t vreinterpretq_u8_p8 (poly8x16_t) * uint16x4_t vreinterpret_u16_u32 (uint32x2_t) * uint16x4_t vreinterpret_u16_u8 (uint8x8_t) * uint16x4_t vreinterpret_u16_s32 (int32x2_t) * uint16x4_t vreinterpret_u16_s16 (int16x4_t) * uint16x4_t vreinterpret_u16_s8 (int8x8_t) * uint16x4_t vreinterpret_u16_u64 (uint64x1_t) * uint16x4_t vreinterpret_u16_s64 (int64x1_t) * uint16x4_t vreinterpret_u16_f32 (float32x2_t) * uint16x4_t vreinterpret_u16_p16 (poly16x4_t) * uint16x4_t vreinterpret_u16_p8 (poly8x8_t) * uint16x8_t vreinterpretq_u16_u32 (uint32x4_t) * uint16x8_t vreinterpretq_u16_u8 (uint8x16_t) * uint16x8_t vreinterpretq_u16_s32 (int32x4_t) * uint16x8_t vreinterpretq_u16_s16 (int16x8_t) * uint16x8_t vreinterpretq_u16_s8 (int8x16_t) * uint16x8_t vreinterpretq_u16_u64 (uint64x2_t) * uint16x8_t vreinterpretq_u16_s64 (int64x2_t) * uint16x8_t vreinterpretq_u16_f32 (float32x4_t) * uint16x8_t vreinterpretq_u16_p16 (poly16x8_t) * uint16x8_t vreinterpretq_u16_p8 (poly8x16_t) * uint32x2_t vreinterpret_u32_u16 (uint16x4_t) * uint32x2_t vreinterpret_u32_u8 (uint8x8_t) * uint32x2_t vreinterpret_u32_s32 (int32x2_t) * uint32x2_t vreinterpret_u32_s16 (int16x4_t) * uint32x2_t vreinterpret_u32_s8 (int8x8_t) * uint32x2_t vreinterpret_u32_u64 (uint64x1_t) * uint32x2_t vreinterpret_u32_s64 (int64x1_t) * uint32x2_t vreinterpret_u32_f32 (float32x2_t) * uint32x2_t vreinterpret_u32_p16 (poly16x4_t) * uint32x2_t vreinterpret_u32_p8 (poly8x8_t) * uint32x4_t vreinterpretq_u32_u16 (uint16x8_t) * uint32x4_t vreinterpretq_u32_u8 (uint8x16_t) * uint32x4_t vreinterpretq_u32_s32 (int32x4_t) * uint32x4_t vreinterpretq_u32_s16 (int16x8_t) * uint32x4_t vreinterpretq_u32_s8 (int8x16_t) * uint32x4_t vreinterpretq_u32_u64 (uint64x2_t) * uint32x4_t vreinterpretq_u32_s64 (int64x2_t) * uint32x4_t vreinterpretq_u32_f32 (float32x4_t) * uint32x4_t vreinterpretq_u32_p16 (poly16x8_t) * uint32x4_t vreinterpretq_u32_p8 (poly8x16_t)  File: gcc.info, Node: Blackfin Built-in Functions, Next: FR-V Built-in Functions, Prev: ARM NEON Intrinsics, Up: Target Builtins 5.50.4 Blackfin Built-in Functions ---------------------------------- Currently, there are two Blackfin-specific built-in functions. These are used for generating `CSYNC' and `SSYNC' machine insns without using inline assembly; by using these built-in functions the compiler can automatically add workarounds for hardware errata involving these instructions. These functions are named as follows: void __builtin_bfin_csync (void) void __builtin_bfin_ssync (void)  File: gcc.info, Node: FR-V Built-in Functions, Next: X86 Built-in Functions, Prev: Blackfin Built-in Functions, Up: Target Builtins 5.50.5 FR-V Built-in Functions ------------------------------ GCC provides many FR-V-specific built-in functions. In general, these functions are intended to be compatible with those described by `FR-V Family, Softune C/C++ Compiler Manual (V6), Fujitsu Semiconductor'. The two exceptions are `__MDUNPACKH' and `__MBTOHE', the gcc forms of which pass 128-bit values by pointer rather than by value. Most of the functions are named after specific FR-V instructions. Such functions are said to be "directly mapped" and are summarized here in tabular form. * Menu: * Argument Types:: * Directly-mapped Integer Functions:: * Directly-mapped Media Functions:: * Raw read/write Functions:: * Other Built-in Functions::  File: gcc.info, Node: Argument Types, Next: Directly-mapped Integer Functions, Up: FR-V Built-in Functions 5.50.5.1 Argument Types ....................... The arguments to the built-in functions can be divided into three groups: register numbers, compile-time constants and run-time values. In order to make this classification clear at a glance, the arguments and return values are given the following pseudo types: Pseudo type Real C type Constant? Description `uh' `unsigned short' No an unsigned halfword `uw1' `unsigned int' No an unsigned word `sw1' `int' No a signed word `uw2' `unsigned long long' No an unsigned doubleword `sw2' `long long' No a signed doubleword `const' `int' Yes an integer constant `acc' `int' Yes an ACC register number `iacc' `int' Yes an IACC register number These pseudo types are not defined by GCC, they are simply a notational convenience used in this manual. Arguments of type `uh', `uw1', `sw1', `uw2' and `sw2' are evaluated at run time. They correspond to register operands in the underlying FR-V instructions. `const' arguments represent immediate operands in the underlying FR-V instructions. They must be compile-time constants. `acc' arguments are evaluated at compile time and specify the number of an accumulator register. For example, an `acc' argument of 2 will select the ACC2 register. `iacc' arguments are similar to `acc' arguments but specify the number of an IACC register. See *note Other Built-in Functions:: for more details.  File: gcc.info, Node: Directly-mapped Integer Functions, Next: Directly-mapped Media Functions, Prev: Argument Types, Up: FR-V Built-in Functions 5.50.5.2 Directly-mapped Integer Functions .......................................... The functions listed below map directly to FR-V I-type instructions. Function prototype Example usage Assembly output `sw1 __ADDSS (sw1, sw1)' `C = __ADDSS (A, B)' `ADDSS A,B,C' `sw1 __SCAN (sw1, sw1)' `C = __SCAN (A, B)' `SCAN A,B,C' `sw1 __SCUTSS (sw1)' `B = __SCUTSS (A)' `SCUTSS A,B' `sw1 __SLASS (sw1, sw1)' `C = __SLASS (A, B)' `SLASS A,B,C' `void __SMASS (sw1, sw1)' `__SMASS (A, B)' `SMASS A,B' `void __SMSSS (sw1, sw1)' `__SMSSS (A, B)' `SMSSS A,B' `void __SMU (sw1, sw1)' `__SMU (A, B)' `SMU A,B' `sw2 __SMUL (sw1, sw1)' `C = __SMUL (A, B)' `SMUL A,B,C' `sw1 __SUBSS (sw1, sw1)' `C = __SUBSS (A, B)' `SUBSS A,B,C' `uw2 __UMUL (uw1, uw1)' `C = __UMUL (A, B)' `UMUL A,B,C'  File: gcc.info, Node: Directly-mapped Media Functions, Next: Raw read/write Functions, Prev: Directly-mapped Integer Functions, Up: FR-V Built-in Functions 5.50.5.3 Directly-mapped Media Functions ........................................ The functions listed below map directly to FR-V M-type instructions. Function prototype Example usage Assembly output `uw1 __MABSHS (sw1)' `B = __MABSHS (A)' `MABSHS A,B' `void __MADDACCS (acc, acc)' `__MADDACCS (B, A)' `MADDACCS A,B' `sw1 __MADDHSS (sw1, sw1)' `C = __MADDHSS (A, B)' `MADDHSS A,B,C' `uw1 __MADDHUS (uw1, uw1)' `C = __MADDHUS (A, B)' `MADDHUS A,B,C' `uw1 __MAND (uw1, uw1)' `C = __MAND (A, B)' `MAND A,B,C' `void __MASACCS (acc, acc)' `__MASACCS (B, A)' `MASACCS A,B' `uw1 __MAVEH (uw1, uw1)' `C = __MAVEH (A, B)' `MAVEH A,B,C' `uw2 __MBTOH (uw1)' `B = __MBTOH (A)' `MBTOH A,B' `void __MBTOHE (uw1 *, uw1)' `__MBTOHE (&B, A)' `MBTOHE A,B' `void __MCLRACC (acc)' `__MCLRACC (A)' `MCLRACC A' `void __MCLRACCA (void)' `__MCLRACCA ()' `MCLRACCA' `uw1 __Mcop1 (uw1, uw1)' `C = __Mcop1 (A, B)' `Mcop1 A,B,C' `uw1 __Mcop2 (uw1, uw1)' `C = __Mcop2 (A, B)' `Mcop2 A,B,C' `uw1 __MCPLHI (uw2, const)' `C = __MCPLHI (A, B)' `MCPLHI A,#B,C' `uw1 __MCPLI (uw2, const)' `C = __MCPLI (A, B)' `MCPLI A,#B,C' `void __MCPXIS (acc, sw1, sw1)' `__MCPXIS (C, A, B)' `MCPXIS A,B,C' `void __MCPXIU (acc, uw1, uw1)' `__MCPXIU (C, A, B)' `MCPXIU A,B,C' `void __MCPXRS (acc, sw1, sw1)' `__MCPXRS (C, A, B)' `MCPXRS A,B,C' `void __MCPXRU (acc, uw1, uw1)' `__MCPXRU (C, A, B)' `MCPXRU A,B,C' `uw1 __MCUT (acc, uw1)' `C = __MCUT (A, B)' `MCUT A,B,C' `uw1 __MCUTSS (acc, sw1)' `C = __MCUTSS (A, B)' `MCUTSS A,B,C' `void __MDADDACCS (acc, acc)' `__MDADDACCS (B, A)' `MDADDACCS A,B' `void __MDASACCS (acc, acc)' `__MDASACCS (B, A)' `MDASACCS A,B' `uw2 __MDCUTSSI (acc, const)' `C = __MDCUTSSI (A, B)' `MDCUTSSI A,#B,C' `uw2 __MDPACKH (uw2, uw2)' `C = __MDPACKH (A, B)' `MDPACKH A,B,C' `uw2 __MDROTLI (uw2, const)' `C = __MDROTLI (A, B)' `MDROTLI A,#B,C' `void __MDSUBACCS (acc, acc)' `__MDSUBACCS (B, A)' `MDSUBACCS A,B' `void __MDUNPACKH (uw1 *, uw2)' `__MDUNPACKH (&B, A)' `MDUNPACKH A,B' `uw2 __MEXPDHD (uw1, const)' `C = __MEXPDHD (A, B)' `MEXPDHD A,#B,C' `uw1 __MEXPDHW (uw1, const)' `C = __MEXPDHW (A, B)' `MEXPDHW A,#B,C' `uw1 __MHDSETH (uw1, const)' `C = __MHDSETH (A, B)' `MHDSETH A,#B,C' `sw1 __MHDSETS (const)' `B = __MHDSETS (A)' `MHDSETS #A,B' `uw1 __MHSETHIH (uw1, const)' `B = __MHSETHIH (B, A)' `MHSETHIH #A,B' `sw1 __MHSETHIS (sw1, const)' `B = __MHSETHIS (B, A)' `MHSETHIS #A,B' `uw1 __MHSETLOH (uw1, const)' `B = __MHSETLOH (B, A)' `MHSETLOH #A,B' `sw1 __MHSETLOS (sw1, const)' `B = __MHSETLOS (B, A)' `MHSETLOS #A,B' `uw1 __MHTOB (uw2)' `B = __MHTOB (A)' `MHTOB A,B' `void __MMACHS (acc, sw1, sw1)' `__MMACHS (C, A, B)' `MMACHS A,B,C' `void __MMACHU (acc, uw1, uw1)' `__MMACHU (C, A, B)' `MMACHU A,B,C' `void __MMRDHS (acc, sw1, sw1)' `__MMRDHS (C, A, B)' `MMRDHS A,B,C' `void __MMRDHU (acc, uw1, uw1)' `__MMRDHU (C, A, B)' `MMRDHU A,B,C' `void __MMULHS (acc, sw1, sw1)' `__MMULHS (C, A, B)' `MMULHS A,B,C' `void __MMULHU (acc, uw1, uw1)' `__MMULHU (C, A, B)' `MMULHU A,B,C' `void __MMULXHS (acc, sw1, sw1)' `__MMULXHS (C, A, B)' `MMULXHS A,B,C' `void __MMULXHU (acc, uw1, uw1)' `__MMULXHU (C, A, B)' `MMULXHU A,B,C' `uw1 __MNOT (uw1)' `B = __MNOT (A)' `MNOT A,B' `uw1 __MOR (uw1, uw1)' `C = __MOR (A, B)' `MOR A,B,C' `uw1 __MPACKH (uh, uh)' `C = __MPACKH (A, B)' `MPACKH A,B,C' `sw2 __MQADDHSS (sw2, sw2)' `C = __MQADDHSS (A, B)' `MQADDHSS A,B,C' `uw2 __MQADDHUS (uw2, uw2)' `C = __MQADDHUS (A, B)' `MQADDHUS A,B,C' `void __MQCPXIS (acc, sw2, sw2)' `__MQCPXIS (C, A, B)' `MQCPXIS A,B,C' `void __MQCPXIU (acc, uw2, uw2)' `__MQCPXIU (C, A, B)' `MQCPXIU A,B,C' `void __MQCPXRS (acc, sw2, sw2)' `__MQCPXRS (C, A, B)' `MQCPXRS A,B,C' `void __MQCPXRU (acc, uw2, uw2)' `__MQCPXRU (C, A, B)' `MQCPXRU A,B,C' `sw2 __MQLCLRHS (sw2, sw2)' `C = __MQLCLRHS (A, B)' `MQLCLRHS A,B,C' `sw2 __MQLMTHS (sw2, sw2)' `C = __MQLMTHS (A, B)' `MQLMTHS A,B,C' `void __MQMACHS (acc, sw2, sw2)' `__MQMACHS (C, A, B)' `MQMACHS A,B,C' `void __MQMACHU (acc, uw2, uw2)' `__MQMACHU (C, A, B)' `MQMACHU A,B,C' `void __MQMACXHS (acc, sw2, `__MQMACXHS (C, A, B)' `MQMACXHS A,B,C' sw2)' `void __MQMULHS (acc, sw2, sw2)' `__MQMULHS (C, A, B)' `MQMULHS A,B,C' `void __MQMULHU (acc, uw2, uw2)' `__MQMULHU (C, A, B)' `MQMULHU A,B,C' `void __MQMULXHS (acc, sw2, `__MQMULXHS (C, A, B)' `MQMULXHS A,B,C' sw2)' `void __MQMULXHU (acc, uw2, `__MQMULXHU (C, A, B)' `MQMULXHU A,B,C' uw2)' `sw2 __MQSATHS (sw2, sw2)' `C = __MQSATHS (A, B)' `MQSATHS A,B,C' `uw2 __MQSLLHI (uw2, int)' `C = __MQSLLHI (A, B)' `MQSLLHI A,B,C' `sw2 __MQSRAHI (sw2, int)' `C = __MQSRAHI (A, B)' `MQSRAHI A,B,C' `sw2 __MQSUBHSS (sw2, sw2)' `C = __MQSUBHSS (A, B)' `MQSUBHSS A,B,C' `uw2 __MQSUBHUS (uw2, uw2)' `C = __MQSUBHUS (A, B)' `MQSUBHUS A,B,C' `void __MQXMACHS (acc, sw2, `__MQXMACHS (C, A, B)' `MQXMACHS A,B,C' sw2)' `void __MQXMACXHS (acc, sw2, `__MQXMACXHS (C, A, B)' `MQXMACXHS A,B,C' sw2)' `uw1 __MRDACC (acc)' `B = __MRDACC (A)' `MRDACC A,B' `uw1 __MRDACCG (acc)' `B = __MRDACCG (A)' `MRDACCG A,B' `uw1 __MROTLI (uw1, const)' `C = __MROTLI (A, B)' `MROTLI A,#B,C' `uw1 __MROTRI (uw1, const)' `C = __MROTRI (A, B)' `MROTRI A,#B,C' `sw1 __MSATHS (sw1, sw1)' `C = __MSATHS (A, B)' `MSATHS A,B,C' `uw1 __MSATHU (uw1, uw1)' `C = __MSATHU (A, B)' `MSATHU A,B,C' `uw1 __MSLLHI (uw1, const)' `C = __MSLLHI (A, B)' `MSLLHI A,#B,C' `sw1 __MSRAHI (sw1, const)' `C = __MSRAHI (A, B)' `MSRAHI A,#B,C' `uw1 __MSRLHI (uw1, const)' `C = __MSRLHI (A, B)' `MSRLHI A,#B,C' `void __MSUBACCS (acc, acc)' `__MSUBACCS (B, A)' `MSUBACCS A,B' `sw1 __MSUBHSS (sw1, sw1)' `C = __MSUBHSS (A, B)' `MSUBHSS A,B,C' `uw1 __MSUBHUS (uw1, uw1)' `C = __MSUBHUS (A, B)' `MSUBHUS A,B,C' `void __MTRAP (void)' `__MTRAP ()' `MTRAP' `uw2 __MUNPACKH (uw1)' `B = __MUNPACKH (A)' `MUNPACKH A,B' `uw1 __MWCUT (uw2, uw1)' `C = __MWCUT (A, B)' `MWCUT A,B,C' `void __MWTACC (acc, uw1)' `__MWTACC (B, A)' `MWTACC A,B' `void __MWTACCG (acc, uw1)' `__MWTACCG (B, A)' `MWTACCG A,B' `uw1 __MXOR (uw1, uw1)' `C = __MXOR (A, B)' `MXOR A,B,C'  File: gcc.info, Node: Raw read/write Functions, Next: Other Built-in Functions, Prev: Directly-mapped Media Functions, Up: FR-V Built-in Functions 5.50.5.4 Raw read/write Functions ................................. This sections describes built-in functions related to read and write instructions to access memory. These functions generate `membar' instructions to flush the I/O load and stores where appropriate, as described in Fujitsu's manual described above. `unsigned char __builtin_read8 (void *DATA)' `unsigned short __builtin_read16 (void *DATA)' `unsigned long __builtin_read32 (void *DATA)' `unsigned long long __builtin_read64 (void *DATA)' `void __builtin_write8 (void *DATA, unsigned char DATUM)' `void __builtin_write16 (void *DATA, unsigned short DATUM)' `void __builtin_write32 (void *DATA, unsigned long DATUM)' `void __builtin_write64 (void *DATA, unsigned long long DATUM)'  File: gcc.info, Node: Other Built-in Functions, Prev: Raw read/write Functions, Up: FR-V Built-in Functions 5.50.5.5 Other Built-in Functions ................................. This section describes built-in functions that are not named after a specific FR-V instruction. `sw2 __IACCreadll (iacc REG)' Return the full 64-bit value of IACC0. The REG argument is reserved for future expansion and must be 0. `sw1 __IACCreadl (iacc REG)' Return the value of IACC0H if REG is 0 and IACC0L if REG is 1. Other values of REG are rejected as invalid. `void __IACCsetll (iacc REG, sw2 X)' Set the full 64-bit value of IACC0 to X. The REG argument is reserved for future expansion and must be 0. `void __IACCsetl (iacc REG, sw1 X)' Set IACC0H to X if REG is 0 and IACC0L to X if REG is 1. Other values of REG are rejected as invalid. `void __data_prefetch0 (const void *X)' Use the `dcpl' instruction to load the contents of address X into the data cache. `void __data_prefetch (const void *X)' Use the `nldub' instruction to load the contents of address X into the data cache. The instruction will be issued in slot I1.  File: gcc.info, Node: X86 Built-in Functions, Next: MIPS DSP Built-in Functions, Prev: FR-V Built-in Functions, Up: Target Builtins 5.50.6 X86 Built-in Functions ----------------------------- These built-in functions are available for the i386 and x86-64 family of computers, depending on the command-line switches used. Note that, if you specify command-line switches such as `-msse', the compiler could use the extended instruction sets even if the built-ins are not used explicitly in the program. For this reason, applications which perform runtime CPU detection must compile separate files for each supported architecture, using the appropriate flags. In particular, the file containing the CPU detection code should be compiled without these options. The following machine modes are available for use with MMX built-in functions (*note Vector Extensions::): `V2SI' for a vector of two 32-bit integers, `V4HI' for a vector of four 16-bit integers, and `V8QI' for a vector of eight 8-bit integers. Some of the built-in functions operate on MMX registers as a whole 64-bit entity, these use `DI' as their mode. If 3Dnow extensions are enabled, `V2SF' is used as a mode for a vector of two 32-bit floating point values. If SSE extensions are enabled, `V4SF' is used for a vector of four 32-bit floating point values. Some instructions use a vector of four 32-bit integers, these use `V4SI'. Finally, some instructions operate on an entire vector register, interpreting it as a 128-bit integer, these use mode `TI'. In 64-bit mode, the x86-64 family of processors uses additional built-in functions for efficient use of `TF' (`__float128') 128-bit floating point and `TC' 128-bit complex floating point values. The following floating point built-in functions are available in 64-bit mode. All of them implement the function that is part of the name. __float128 __builtin_fabsq (__float128) __float128 __builtin_copysignq (__float128, __float128) The following floating point built-in functions are made available in the 64-bit mode. `__float128 __builtin_infq (void)' Similar to `__builtin_inf', except the return type is `__float128'. The following built-in functions are made available by `-mmmx'. All of them generate the machine instruction that is part of the name. v8qi __builtin_ia32_paddb (v8qi, v8qi) v4hi __builtin_ia32_paddw (v4hi, v4hi) v2si __builtin_ia32_paddd (v2si, v2si) v8qi __builtin_ia32_psubb (v8qi, v8qi) v4hi __builtin_ia32_psubw (v4hi, v4hi) v2si __builtin_ia32_psubd (v2si, v2si) v8qi __builtin_ia32_paddsb (v8qi, v8qi) v4hi __builtin_ia32_paddsw (v4hi, v4hi) v8qi __builtin_ia32_psubsb (v8qi, v8qi) v4hi __builtin_ia32_psubsw (v4hi, v4hi) v8qi __builtin_ia32_paddusb (v8qi, v8qi) v4hi __builtin_ia32_paddusw (v4hi, v4hi) v8qi __builtin_ia32_psubusb (v8qi, v8qi) v4hi __builtin_ia32_psubusw (v4hi, v4hi) v4hi __builtin_ia32_pmullw (v4hi, v4hi) v4hi __builtin_ia32_pmulhw (v4hi, v4hi) di __builtin_ia32_pand (di, di) di __builtin_ia32_pandn (di,di) di __builtin_ia32_por (di, di) di __builtin_ia32_pxor (di, di) v8qi __builtin_ia32_pcmpeqb (v8qi, v8qi) v4hi __builtin_ia32_pcmpeqw (v4hi, v4hi) v2si __builtin_ia32_pcmpeqd (v2si, v2si) v8qi __builtin_ia32_pcmpgtb (v8qi, v8qi) v4hi __builtin_ia32_pcmpgtw (v4hi, v4hi) v2si __builtin_ia32_pcmpgtd (v2si, v2si) v8qi __builtin_ia32_punpckhbw (v8qi, v8qi) v4hi __builtin_ia32_punpckhwd (v4hi, v4hi) v2si __builtin_ia32_punpckhdq (v2si, v2si) v8qi __builtin_ia32_punpcklbw (v8qi, v8qi) v4hi __builtin_ia32_punpcklwd (v4hi, v4hi) v2si __builtin_ia32_punpckldq (v2si, v2si) v8qi __builtin_ia32_packsswb (v4hi, v4hi) v4hi __builtin_ia32_packssdw (v2si, v2si) v8qi __builtin_ia32_packuswb (v4hi, v4hi) The following built-in functions are made available either with `-msse', or with a combination of `-m3dnow' and `-march=athlon'. All of them generate the machine instruction that is part of the name. v4hi __builtin_ia32_pmulhuw (v4hi, v4hi) v8qi __builtin_ia32_pavgb (v8qi, v8qi) v4hi __builtin_ia32_pavgw (v4hi, v4hi) v4hi __builtin_ia32_psadbw (v8qi, v8qi) v8qi __builtin_ia32_pmaxub (v8qi, v8qi) v4hi __builtin_ia32_pmaxsw (v4hi, v4hi) v8qi __builtin_ia32_pminub (v8qi, v8qi) v4hi __builtin_ia32_pminsw (v4hi, v4hi) int __builtin_ia32_pextrw (v4hi, int) v4hi __builtin_ia32_pinsrw (v4hi, int, int) int __builtin_ia32_pmovmskb (v8qi) void __builtin_ia32_maskmovq (v8qi, v8qi, char *) void __builtin_ia32_movntq (di *, di) void __builtin_ia32_sfence (void) The following built-in functions are available when `-msse' is used. All of them generate the machine instruction that is part of the name. int __builtin_ia32_comieq (v4sf, v4sf) int __builtin_ia32_comineq (v4sf, v4sf) int __builtin_ia32_comilt (v4sf, v4sf) int __builtin_ia32_comile (v4sf, v4sf) int __builtin_ia32_comigt (v4sf, v4sf) int __builtin_ia32_comige (v4sf, v4sf) int __builtin_ia32_ucomieq (v4sf, v4sf) int __builtin_ia32_ucomineq (v4sf, v4sf) int __builtin_ia32_ucomilt (v4sf, v4sf) int __builtin_ia32_ucomile (v4sf, v4sf) int __builtin_ia32_ucomigt (v4sf, v4sf) int __builtin_ia32_ucomige (v4sf, v4sf) v4sf __builtin_ia32_addps (v4sf, v4sf) v4sf __builtin_ia32_subps (v4sf, v4sf) v4sf __builtin_ia32_mulps (v4sf, v4sf) v4sf __builtin_ia32_divps (v4sf, v4sf) v4sf __builtin_ia32_addss (v4sf, v4sf) v4sf __builtin_ia32_subss (v4sf, v4sf) v4sf __builtin_ia32_mulss (v4sf, v4sf) v4sf __builtin_ia32_divss (v4sf, v4sf) v4si __builtin_ia32_cmpeqps (v4sf, v4sf) v4si __builtin_ia32_cmpltps (v4sf, v4sf) v4si __builtin_ia32_cmpleps (v4sf, v4sf) v4si __builtin_ia32_cmpgtps (v4sf, v4sf) v4si __builtin_ia32_cmpgeps (v4sf, v4sf) v4si __builtin_ia32_cmpunordps (v4sf, v4sf) v4si __builtin_ia32_cmpneqps (v4sf, v4sf) v4si __builtin_ia32_cmpnltps (v4sf, v4sf) v4si __builtin_ia32_cmpnleps (v4sf, v4sf) v4si __builtin_ia32_cmpngtps (v4sf, v4sf) v4si __builtin_ia32_cmpngeps (v4sf, v4sf) v4si __builtin_ia32_cmpordps (v4sf, v4sf) v4si __builtin_ia32_cmpeqss (v4sf, v4sf) v4si __builtin_ia32_cmpltss (v4sf, v4sf) v4si __builtin_ia32_cmpless (v4sf, v4sf) v4si __builtin_ia32_cmpunordss (v4sf, v4sf) v4si __builtin_ia32_cmpneqss (v4sf, v4sf) v4si __builtin_ia32_cmpnlts (v4sf, v4sf) v4si __builtin_ia32_cmpnless (v4sf, v4sf) v4si __builtin_ia32_cmpordss (v4sf, v4sf) v4sf __builtin_ia32_maxps (v4sf, v4sf) v4sf __builtin_ia32_maxss (v4sf, v4sf) v4sf __builtin_ia32_minps (v4sf, v4sf) v4sf __builtin_ia32_minss (v4sf, v4sf) v4sf __builtin_ia32_andps (v4sf, v4sf) v4sf __builtin_ia32_andnps (v4sf, v4sf) v4sf __builtin_ia32_orps (v4sf, v4sf) v4sf __builtin_ia32_xorps (v4sf, v4sf) v4sf __builtin_ia32_movss (v4sf, v4sf) v4sf __builtin_ia32_movhlps (v4sf, v4sf) v4sf __builtin_ia32_movlhps (v4sf, v4sf) v4sf __builtin_ia32_unpckhps (v4sf, v4sf) v4sf __builtin_ia32_unpcklps (v4sf, v4sf) v4sf __builtin_ia32_cvtpi2ps (v4sf, v2si) v4sf __builtin_ia32_cvtsi2ss (v4sf, int) v2si __builtin_ia32_cvtps2pi (v4sf) int __builtin_ia32_cvtss2si (v4sf) v2si __builtin_ia32_cvttps2pi (v4sf) int __builtin_ia32_cvttss2si (v4sf) v4sf __builtin_ia32_rcpps (v4sf) v4sf __builtin_ia32_rsqrtps (v4sf) v4sf __builtin_ia32_sqrtps (v4sf) v4sf __builtin_ia32_rcpss (v4sf) v4sf __builtin_ia32_rsqrtss (v4sf) v4sf __builtin_ia32_sqrtss (v4sf) v4sf __builtin_ia32_shufps (v4sf, v4sf, int) void __builtin_ia32_movntps (float *, v4sf) int __builtin_ia32_movmskps (v4sf) The following built-in functions are available when `-msse' is used. `v4sf __builtin_ia32_loadaps (float *)' Generates the `movaps' machine instruction as a load from memory. `void __builtin_ia32_storeaps (float *, v4sf)' Generates the `movaps' machine instruction as a store to memory. `v4sf __builtin_ia32_loadups (float *)' Generates the `movups' machine instruction as a load from memory. `void __builtin_ia32_storeups (float *, v4sf)' Generates the `movups' machine instruction as a store to memory. `v4sf __builtin_ia32_loadsss (float *)' Generates the `movss' machine instruction as a load from memory. `void __builtin_ia32_storess (float *, v4sf)' Generates the `movss' machine instruction as a store to memory. `v4sf __builtin_ia32_loadhps (v4sf, v2si *)' Generates the `movhps' machine instruction as a load from memory. `v4sf __builtin_ia32_loadlps (v4sf, v2si *)' Generates the `movlps' machine instruction as a load from memory `void __builtin_ia32_storehps (v4sf, v2si *)' Generates the `movhps' machine instruction as a store to memory. `void __builtin_ia32_storelps (v4sf, v2si *)' Generates the `movlps' machine instruction as a store to memory. The following built-in functions are available when `-msse2' is used. All of them generate the machine instruction that is part of the name. int __builtin_ia32_comisdeq (v2df, v2df) int __builtin_ia32_comisdlt (v2df, v2df) int __builtin_ia32_comisdle (v2df, v2df) int __builtin_ia32_comisdgt (v2df, v2df) int __builtin_ia32_comisdge (v2df, v2df) int __builtin_ia32_comisdneq (v2df, v2df) int __builtin_ia32_ucomisdeq (v2df, v2df) int __builtin_ia32_ucomisdlt (v2df, v2df) int __builtin_ia32_ucomisdle (v2df, v2df) int __builtin_ia32_ucomisdgt (v2df, v2df) int __builtin_ia32_ucomisdge (v2df, v2df) int __builtin_ia32_ucomisdneq (v2df, v2df) v2df __builtin_ia32_cmpeqpd (v2df, v2df) v2df __builtin_ia32_cmpltpd (v2df, v2df) v2df __builtin_ia32_cmplepd (v2df, v2df) v2df __builtin_ia32_cmpgtpd (v2df, v2df) v2df __builtin_ia32_cmpgepd (v2df, v2df) v2df __builtin_ia32_cmpunordpd (v2df, v2df) v2df __builtin_ia32_cmpneqpd (v2df, v2df) v2df __builtin_ia32_cmpnltpd (v2df, v2df) v2df __builtin_ia32_cmpnlepd (v2df, v2df) v2df __builtin_ia32_cmpngtpd (v2df, v2df) v2df __builtin_ia32_cmpngepd (v2df, v2df) v2df __builtin_ia32_cmpordpd (v2df, v2df) v2df __builtin_ia32_cmpeqsd (v2df, v2df) v2df __builtin_ia32_cmpltsd (v2df, v2df) v2df __builtin_ia32_cmplesd (v2df, v2df) v2df __builtin_ia32_cmpunordsd (v2df, v2df) v2df __builtin_ia32_cmpneqsd (v2df, v2df) v2df __builtin_ia32_cmpnltsd (v2df, v2df) v2df __builtin_ia32_cmpnlesd (v2df, v2df) v2df __builtin_ia32_cmpordsd (v2df, v2df) v2di __builtin_ia32_paddq (v2di, v2di) v2di __builtin_ia32_psubq (v2di, v2di) v2df __builtin_ia32_addpd (v2df, v2df) v2df __builtin_ia32_subpd (v2df, v2df) v2df __builtin_ia32_mulpd (v2df, v2df) v2df __builtin_ia32_divpd (v2df, v2df) v2df __builtin_ia32_addsd (v2df, v2df) v2df __builtin_ia32_subsd (v2df, v2df) v2df __builtin_ia32_mulsd (v2df, v2df) v2df __builtin_ia32_divsd (v2df, v2df) v2df __builtin_ia32_minpd (v2df, v2df) v2df __builtin_ia32_maxpd (v2df, v2df) v2df __builtin_ia32_minsd (v2df, v2df) v2df __builtin_ia32_maxsd (v2df, v2df) v2df __builtin_ia32_andpd (v2df, v2df) v2df __builtin_ia32_andnpd (v2df, v2df) v2df __builtin_ia32_orpd (v2df, v2df) v2df __builtin_ia32_xorpd (v2df, v2df) v2df __builtin_ia32_movsd (v2df, v2df) v2df __builtin_ia32_unpckhpd (v2df, v2df) v2df __builtin_ia32_unpcklpd (v2df, v2df) v16qi __builtin_ia32_paddb128 (v16qi, v16qi) v8hi __builtin_ia32_paddw128 (v8hi, v8hi) v4si __builtin_ia32_paddd128 (v4si, v4si) v2di __builtin_ia32_paddq128 (v2di, v2di) v16qi __builtin_ia32_psubb128 (v16qi, v16qi) v8hi __builtin_ia32_psubw128 (v8hi, v8hi) v4si __builtin_ia32_psubd128 (v4si, v4si) v2di __builtin_ia32_psubq128 (v2di, v2di) v8hi __builtin_ia32_pmullw128 (v8hi, v8hi) v8hi __builtin_ia32_pmulhw128 (v8hi, v8hi) v2di __builtin_ia32_pand128 (v2di, v2di) v2di __builtin_ia32_pandn128 (v2di, v2di) v2di __builtin_ia32_por128 (v2di, v2di) v2di __builtin_ia32_pxor128 (v2di, v2di) v16qi __builtin_ia32_pavgb128 (v16qi, v16qi) v8hi __builtin_ia32_pavgw128 (v8hi, v8hi) v16qi __builtin_ia32_pcmpeqb128 (v16qi, v16qi) v8hi __builtin_ia32_pcmpeqw128 (v8hi, v8hi) v4si __builtin_ia32_pcmpeqd128 (v4si, v4si) v16qi __builtin_ia32_pcmpgtb128 (v16qi, v16qi) v8hi __builtin_ia32_pcmpgtw128 (v8hi, v8hi) v4si __builtin_ia32_pcmpgtd128 (v4si, v4si) v16qi __builtin_ia32_pmaxub128 (v16qi, v16qi) v8hi __builtin_ia32_pmaxsw128 (v8hi, v8hi) v16qi __builtin_ia32_pminub128 (v16qi, v16qi) v8hi __builtin_ia32_pminsw128 (v8hi, v8hi) v16qi __builtin_ia32_punpckhbw128 (v16qi, v16qi) v8hi __builtin_ia32_punpckhwd128 (v8hi, v8hi) v4si __builtin_ia32_punpckhdq128 (v4si, v4si) v2di __builtin_ia32_punpckhqdq128 (v2di, v2di) v16qi __builtin_ia32_punpcklbw128 (v16qi, v16qi) v8hi __builtin_ia32_punpcklwd128 (v8hi, v8hi) v4si __builtin_ia32_punpckldq128 (v4si, v4si) v2di __builtin_ia32_punpcklqdq128 (v2di, v2di) v16qi __builtin_ia32_packsswb128 (v16qi, v16qi) v8hi __builtin_ia32_packssdw128 (v8hi, v8hi) v16qi __builtin_ia32_packuswb128 (v16qi, v16qi) v8hi __builtin_ia32_pmulhuw128 (v8hi, v8hi) void __builtin_ia32_maskmovdqu (v16qi, v16qi) v2df __builtin_ia32_loadupd (double *) void __builtin_ia32_storeupd (double *, v2df) v2df __builtin_ia32_loadhpd (v2df, double *) v2df __builtin_ia32_loadlpd (v2df, double *) int __builtin_ia32_movmskpd (v2df) int __builtin_ia32_pmovmskb128 (v16qi) void __builtin_ia32_movnti (int *, int) void __builtin_ia32_movntpd (double *, v2df) void __builtin_ia32_movntdq (v2df *, v2df) v4si __builtin_ia32_pshufd (v4si, int) v8hi __builtin_ia32_pshuflw (v8hi, int) v8hi __builtin_ia32_pshufhw (v8hi, int) v2di __builtin_ia32_psadbw128 (v16qi, v16qi) v2df __builtin_ia32_sqrtpd (v2df) v2df __builtin_ia32_sqrtsd (v2df) v2df __builtin_ia32_shufpd (v2df, v2df, int) v2df __builtin_ia32_cvtdq2pd (v4si) v4sf __builtin_ia32_cvtdq2ps (v4si) v4si __builtin_ia32_cvtpd2dq (v2df) v2si __builtin_ia32_cvtpd2pi (v2df) v4sf __builtin_ia32_cvtpd2ps (v2df) v4si __builtin_ia32_cvttpd2dq (v2df) v2si __builtin_ia32_cvttpd2pi (v2df) v2df __builtin_ia32_cvtpi2pd (v2si) int __builtin_ia32_cvtsd2si (v2df) int __builtin_ia32_cvttsd2si (v2df) long long __builtin_ia32_cvtsd2si64 (v2df) long long __builtin_ia32_cvttsd2si64 (v2df) v4si __builtin_ia32_cvtps2dq (v4sf) v2df __builtin_ia32_cvtps2pd (v4sf) v4si __builtin_ia32_cvttps2dq (v4sf) v2df __builtin_ia32_cvtsi2sd (v2df, int) v2df __builtin_ia32_cvtsi642sd (v2df, long long) v4sf __builtin_ia32_cvtsd2ss (v4sf, v2df) v2df __builtin_ia32_cvtss2sd (v2df, v4sf) void __builtin_ia32_clflush (const void *) void __builtin_ia32_lfence (void) void __builtin_ia32_mfence (void) v16qi __builtin_ia32_loaddqu (const char *) void __builtin_ia32_storedqu (char *, v16qi) unsigned long long __builtin_ia32_pmuludq (v2si, v2si) v2di __builtin_ia32_pmuludq128 (v4si, v4si) v8hi __builtin_ia32_psllw128 (v8hi, v2di) v4si __builtin_ia32_pslld128 (v4si, v2di) v2di __builtin_ia32_psllq128 (v4si, v2di) v8hi __builtin_ia32_psrlw128 (v8hi, v2di) v4si __builtin_ia32_psrld128 (v4si, v2di) v2di __builtin_ia32_psrlq128 (v2di, v2di) v8hi __builtin_ia32_psraw128 (v8hi, v2di) v4si __builtin_ia32_psrad128 (v4si, v2di) v2di __builtin_ia32_pslldqi128 (v2di, int) v8hi __builtin_ia32_psllwi128 (v8hi, int) v4si __builtin_ia32_pslldi128 (v4si, int) v2di __builtin_ia32_psllqi128 (v2di, int) v2di __builtin_ia32_psrldqi128 (v2di, int) v8hi __builtin_ia32_psrlwi128 (v8hi, int) v4si __builtin_ia32_psrldi128 (v4si, int) v2di __builtin_ia32_psrlqi128 (v2di, int) v8hi __builtin_ia32_psrawi128 (v8hi, int) v4si __builtin_ia32_psradi128 (v4si, int) v4si __builtin_ia32_pmaddwd128 (v8hi, v8hi) The following built-in functions are available when `-msse3' is used. All of them generate the machine instruction that is part of the name. v2df __builtin_ia32_addsubpd (v2df, v2df) v4sf __builtin_ia32_addsubps (v4sf, v4sf) v2df __builtin_ia32_haddpd (v2df, v2df) v4sf __builtin_ia32_haddps (v4sf, v4sf) v2df __builtin_ia32_hsubpd (v2df, v2df) v4sf __builtin_ia32_hsubps (v4sf, v4sf) v16qi __builtin_ia32_lddqu (char const *) void __builtin_ia32_monitor (void *, unsigned int, unsigned int) v2df __builtin_ia32_movddup (v2df) v4sf __builtin_ia32_movshdup (v4sf) v4sf __builtin_ia32_movsldup (v4sf) void __builtin_ia32_mwait (unsigned int, unsigned int) The following built-in functions are available when `-msse3' is used. `v2df __builtin_ia32_loadddup (double const *)' Generates the `movddup' machine instruction as a load from memory. The following built-in functions are available when `-mssse3' is used. All of them generate the machine instruction that is part of the name with MMX registers. v2si __builtin_ia32_phaddd (v2si, v2si) v4hi __builtin_ia32_phaddw (v4hi, v4hi) v4hi __builtin_ia32_phaddsw (v4hi, v4hi) v2si __builtin_ia32_phsubd (v2si, v2si) v4hi __builtin_ia32_phsubw (v4hi, v4hi) v4hi __builtin_ia32_phsubsw (v4hi, v4hi) v8qi __builtin_ia32_pmaddubsw (v8qi, v8qi) v4hi __builtin_ia32_pmulhrsw (v4hi, v4hi) v8qi __builtin_ia32_pshufb (v8qi, v8qi) v8qi __builtin_ia32_psignb (v8qi, v8qi) v2si __builtin_ia32_psignd (v2si, v2si) v4hi __builtin_ia32_psignw (v4hi, v4hi) long long __builtin_ia32_palignr (long long, long long, int) v8qi __builtin_ia32_pabsb (v8qi) v2si __builtin_ia32_pabsd (v2si) v4hi __builtin_ia32_pabsw (v4hi) The following built-in functions are available when `-mssse3' is used. All of them generate the machine instruction that is part of the name with SSE registers. v4si __builtin_ia32_phaddd128 (v4si, v4si) v8hi __builtin_ia32_phaddw128 (v8hi, v8hi) v8hi __builtin_ia32_phaddsw128 (v8hi, v8hi) v4si __builtin_ia32_phsubd128 (v4si, v4si) v8hi __builtin_ia32_phsubw128 (v8hi, v8hi) v8hi __builtin_ia32_phsubsw128 (v8hi, v8hi) v16qi __builtin_ia32_pmaddubsw128 (v16qi, v16qi) v8hi __builtin_ia32_pmulhrsw128 (v8hi, v8hi) v16qi __builtin_ia32_pshufb128 (v16qi, v16qi) v16qi __builtin_ia32_psignb128 (v16qi, v16qi) v4si __builtin_ia32_psignd128 (v4si, v4si) v8hi __builtin_ia32_psignw128 (v8hi, v8hi) v2di __builtin_ia32_palignr (v2di, v2di, int) v16qi __builtin_ia32_pabsb128 (v16qi) v4si __builtin_ia32_pabsd128 (v4si) v8hi __builtin_ia32_pabsw128 (v8hi) The following built-in functions are available when `-msse4.1' is used. All of them generate the machine instruction that is part of the name. v2df __builtin_ia32_blendpd (v2df, v2df, const int) v4sf __builtin_ia32_blendps (v4sf, v4sf, const int) v2df __builtin_ia32_blendvpd (v2df, v2df, v2df) v4sf __builtin_ia32_blendvps (v4sf, v4sf, v4sf) v2df __builtin_ia32_dppd (v2df, v2df, const int) v4sf __builtin_ia32_dpps (v4sf, v4sf, const int) v4sf __builtin_ia32_insertps128 (v4sf, v4sf, const int) v2di __builtin_ia32_movntdqa (v2di *); v16qi __builtin_ia32_mpsadbw128 (v16qi, v16qi, const int) v8hi __builtin_ia32_packusdw128 (v4si, v4si) v16qi __builtin_ia32_pblendvb128 (v16qi, v16qi, v16qi) v8hi __builtin_ia32_pblendw128 (v8hi, v8hi, const int) v2di __builtin_ia32_pcmpeqq (v2di, v2di) v8hi __builtin_ia32_phminposuw128 (v8hi) v16qi __builtin_ia32_pmaxsb128 (v16qi, v16qi) v4si __builtin_ia32_pmaxsd128 (v4si, v4si) v4si __builtin_ia32_pmaxud128 (v4si, v4si) v8hi __builtin_ia32_pmaxuw128 (v8hi, v8hi) v16qi __builtin_ia32_pminsb128 (v16qi, v16qi) v4si __builtin_ia32_pminsd128 (v4si, v4si) v4si __builtin_ia32_pminud128 (v4si, v4si) v8hi __builtin_ia32_pminuw128 (v8hi, v8hi) v4si __builtin_ia32_pmovsxbd128 (v16qi) v2di __builtin_ia32_pmovsxbq128 (v16qi) v8hi __builtin_ia32_pmovsxbw128 (v16qi) v2di __builtin_ia32_pmovsxdq128 (v4si) v4si __builtin_ia32_pmovsxwd128 (v8hi) v2di __builtin_ia32_pmovsxwq128 (v8hi) v4si __builtin_ia32_pmovzxbd128 (v16qi) v2di __builtin_ia32_pmovzxbq128 (v16qi) v8hi __builtin_ia32_pmovzxbw128 (v16qi) v2di __builtin_ia32_pmovzxdq128 (v4si) v4si __builtin_ia32_pmovzxwd128 (v8hi) v2di __builtin_ia32_pmovzxwq128 (v8hi) v2di __builtin_ia32_pmuldq128 (v4si, v4si) v4si __builtin_ia32_pmulld128 (v4si, v4si) int __builtin_ia32_ptestc128 (v2di, v2di) int __builtin_ia32_ptestnzc128 (v2di, v2di) int __builtin_ia32_ptestz128 (v2di, v2di) v2df __builtin_ia32_roundpd (v2df, const int) v4sf __builtin_ia32_roundps (v4sf, const int) v2df __builtin_ia32_roundsd (v2df, v2df, const int) v4sf __builtin_ia32_roundss (v4sf, v4sf, const int) The following built-in functions are available when `-msse4.1' is used. `v4sf __builtin_ia32_vec_set_v4sf (v4sf, float, const int)' Generates the `insertps' machine instruction. `int __builtin_ia32_vec_ext_v16qi (v16qi, const int)' Generates the `pextrb' machine instruction. `v16qi __builtin_ia32_vec_set_v16qi (v16qi, int, const int)' Generates the `pinsrb' machine instruction. `v4si __builtin_ia32_vec_set_v4si (v4si, int, const int)' Generates the `pinsrd' machine instruction. `v2di __builtin_ia32_vec_set_v2di (v2di, long long, const int)' Generates the `pinsrq' machine instruction in 64bit mode. The following built-in functions are changed to generate new SSE4.1 instructions when `-msse4.1' is used. `float __builtin_ia32_vec_ext_v4sf (v4sf, const int)' Generates the `extractps' machine instruction. `int __builtin_ia32_vec_ext_v4si (v4si, const int)' Generates the `pextrd' machine instruction. `long long __builtin_ia32_vec_ext_v2di (v2di, const int)' Generates the `pextrq' machine instruction in 64bit mode. The following built-in functions are available when `-msse4.2' is used. All of them generate the machine instruction that is part of the name. v16qi __builtin_ia32_pcmpestrm128 (v16qi, int, v16qi, int, const int) int __builtin_ia32_pcmpestri128 (v16qi, int, v16qi, int, const int) int __builtin_ia32_pcmpestria128 (v16qi, int, v16qi, int, const int) int __builtin_ia32_pcmpestric128 (v16qi, int, v16qi, int, const int) int __builtin_ia32_pcmpestrio128 (v16qi, int, v16qi, int, const int) int __builtin_ia32_pcmpestris128 (v16qi, int, v16qi, int, const int) int __builtin_ia32_pcmpestriz128 (v16qi, int, v16qi, int, const int) v16qi __builtin_ia32_pcmpistrm128 (v16qi, v16qi, const int) int __builtin_ia32_pcmpistri128 (v16qi, v16qi, const int) int __builtin_ia32_pcmpistria128 (v16qi, v16qi, const int) int __builtin_ia32_pcmpistric128 (v16qi, v16qi, const int) int __builtin_ia32_pcmpistrio128 (v16qi, v16qi, const int) int __builtin_ia32_pcmpistris128 (v16qi, v16qi, const int) int __builtin_ia32_pcmpistriz128 (v16qi, v16qi, const int) v2di __builtin_ia32_pcmpgtq (v2di, v2di) The following built-in functions are available when `-msse4.2' is used. `unsigned int __builtin_ia32_crc32qi (unsigned int, unsigned char)' Generates the `crc32b' machine instruction. `unsigned int __builtin_ia32_crc32hi (unsigned int, unsigned short)' Generates the `crc32w' machine instruction. `unsigned int __builtin_ia32_crc32si (unsigned int, unsigned int)' Generates the `crc32l' machine instruction. `unsigned long long __builtin_ia32_crc32di (unsigned long long, unsigned long long)' The following built-in functions are changed to generate new SSE4.2 instructions when `-msse4.2' is used. `int __builtin_popcount (unsigned int)' Generates the `popcntl' machine instruction. `int __builtin_popcountl (unsigned long)' Generates the `popcntl' or `popcntq' machine instruction, depending on the size of `unsigned long'. `int __builtin_popcountll (unsigned long long)' Generates the `popcntq' machine instruction. The following built-in functions are available when `-msse4a' is used. All of them generate the machine instruction that is part of the name. void __builtin_ia32_movntsd (double *, v2df) void __builtin_ia32_movntss (float *, v4sf) v2di __builtin_ia32_extrq (v2di, v16qi) v2di __builtin_ia32_extrqi (v2di, const unsigned int, const unsigned int) v2di __builtin_ia32_insertq (v2di, v2di) v2di __builtin_ia32_insertqi (v2di, v2di, const unsigned int, const unsigned int) The following built-in functions are available when `-msse5' is used. All of them generate the machine instruction that is part of the name with MMX registers. v2df __builtin_ia32_comeqpd (v2df, v2df) v2df __builtin_ia32_comeqps (v2df, v2df) v4sf __builtin_ia32_comeqsd (v4sf, v4sf) v4sf __builtin_ia32_comeqss (v4sf, v4sf) v2df __builtin_ia32_comfalsepd (v2df, v2df) v2df __builtin_ia32_comfalseps (v2df, v2df) v4sf __builtin_ia32_comfalsesd (v4sf, v4sf) v4sf __builtin_ia32_comfalsess (v4sf, v4sf) v2df __builtin_ia32_comgepd (v2df, v2df) v2df __builtin_ia32_comgeps (v2df, v2df) v4sf __builtin_ia32_comgesd (v4sf, v4sf) v4sf __builtin_ia32_comgess (v4sf, v4sf) v2df __builtin_ia32_comgtpd (v2df, v2df) v2df __builtin_ia32_comgtps (v2df, v2df) v4sf __builtin_ia32_comgtsd (v4sf, v4sf) v4sf __builtin_ia32_comgtss (v4sf, v4sf) v2df __builtin_ia32_comlepd (v2df, v2df) v2df __builtin_ia32_comleps (v2df, v2df) v4sf __builtin_ia32_comlesd (v4sf, v4sf) v4sf __builtin_ia32_comless (v4sf, v4sf) v2df __builtin_ia32_comltpd (v2df, v2df) v2df __builtin_ia32_comltps (v2df, v2df) v4sf __builtin_ia32_comltsd (v4sf, v4sf) v4sf __builtin_ia32_comltss (v4sf, v4sf) v2df __builtin_ia32_comnepd (v2df, v2df) v2df __builtin_ia32_comneps (v2df, v2df) v4sf __builtin_ia32_comnesd (v4sf, v4sf) v4sf __builtin_ia32_comness (v4sf, v4sf) v2df __builtin_ia32_comordpd (v2df, v2df) v2df __builtin_ia32_comordps (v2df, v2df) v4sf __builtin_ia32_comordsd (v4sf, v4sf) v4sf __builtin_ia32_comordss (v4sf, v4sf) v2df __builtin_ia32_comtruepd (v2df, v2df) v2df __builtin_ia32_comtrueps (v2df, v2df) v4sf __builtin_ia32_comtruesd (v4sf, v4sf) v4sf __builtin_ia32_comtruess (v4sf, v4sf) v2df __builtin_ia32_comueqpd (v2df, v2df) v2df __builtin_ia32_comueqps (v2df, v2df) v4sf __builtin_ia32_comueqsd (v4sf, v4sf) v4sf __builtin_ia32_comueqss (v4sf, v4sf) v2df __builtin_ia32_comugepd (v2df, v2df) v2df __builtin_ia32_comugeps (v2df, v2df) v4sf __builtin_ia32_comugesd (v4sf, v4sf) v4sf __builtin_ia32_comugess (v4sf, v4sf) v2df __builtin_ia32_comugtpd (v2df, v2df) v2df __builtin_ia32_comugtps (v2df, v2df) v4sf __builtin_ia32_comugtsd (v4sf, v4sf) v4sf __builtin_ia32_comugtss (v4sf, v4sf) v2df __builtin_ia32_comulepd (v2df, v2df) v2df __builtin_ia32_comuleps (v2df, v2df) v4sf __builtin_ia32_comulesd (v4sf, v4sf) v4sf __builtin_ia32_comuless (v4sf, v4sf) v2df __builtin_ia32_comultpd (v2df, v2df) v2df __builtin_ia32_comultps (v2df, v2df) v4sf __builtin_ia32_comultsd (v4sf, v4sf) v4sf __builtin_ia32_comultss (v4sf, v4sf) v2df __builtin_ia32_comunepd (v2df, v2df) v2df __builtin_ia32_comuneps (v2df, v2df) v4sf __builtin_ia32_comunesd (v4sf, v4sf) v4sf __builtin_ia32_comuness (v4sf, v4sf) v2df __builtin_ia32_comunordpd (v2df, v2df) v2df __builtin_ia32_comunordps (v2df, v2df) v4sf __builtin_ia32_comunordsd (v4sf, v4sf) v4sf __builtin_ia32_comunordss (v4sf, v4sf) v2df __builtin_ia32_fmaddpd (v2df, v2df, v2df) v4sf __builtin_ia32_fmaddps (v4sf, v4sf, v4sf) v2df __builtin_ia32_fmaddsd (v2df, v2df, v2df) v4sf __builtin_ia32_fmaddss (v4sf, v4sf, v4sf) v2df __builtin_ia32_fmsubpd (v2df, v2df, v2df) v4sf __builtin_ia32_fmsubps (v4sf, v4sf, v4sf) v2df __builtin_ia32_fmsubsd (v2df, v2df, v2df) v4sf __builtin_ia32_fmsubss (v4sf, v4sf, v4sf) v2df __builtin_ia32_fnmaddpd (v2df, v2df, v2df) v4sf __builtin_ia32_fnmaddps (v4sf, v4sf, v4sf) v2df __builtin_ia32_fnmaddsd (v2df, v2df, v2df) v4sf __builtin_ia32_fnmaddss (v4sf, v4sf, v4sf) v2df __builtin_ia32_fnmsubpd (v2df, v2df, v2df) v4sf __builtin_ia32_fnmsubps (v4sf, v4sf, v4sf) v2df __builtin_ia32_fnmsubsd (v2df, v2df, v2df) v4sf __builtin_ia32_fnmsubss (v4sf, v4sf, v4sf) v2df __builtin_ia32_frczpd (v2df) v4sf __builtin_ia32_frczps (v4sf) v2df __builtin_ia32_frczsd (v2df, v2df) v4sf __builtin_ia32_frczss (v4sf, v4sf) v2di __builtin_ia32_pcmov (v2di, v2di, v2di) v2di __builtin_ia32_pcmov_v2di (v2di, v2di, v2di) v4si __builtin_ia32_pcmov_v4si (v4si, v4si, v4si) v8hi __builtin_ia32_pcmov_v8hi (v8hi, v8hi, v8hi) v16qi __builtin_ia32_pcmov_v16qi (v16qi, v16qi, v16qi) v2df __builtin_ia32_pcmov_v2df (v2df, v2df, v2df) v4sf __builtin_ia32_pcmov_v4sf (v4sf, v4sf, v4sf) v16qi __builtin_ia32_pcomeqb (v16qi, v16qi) v8hi __builtin_ia32_pcomeqw (v8hi, v8hi) v4si __builtin_ia32_pcomeqd (v4si, v4si) v2di __builtin_ia32_pcomeqq (v2di, v2di) v16qi __builtin_ia32_pcomequb (v16qi, v16qi) v4si __builtin_ia32_pcomequd (v4si, v4si) v2di __builtin_ia32_pcomequq (v2di, v2di) v8hi __builtin_ia32_pcomequw (v8hi, v8hi) v8hi __builtin_ia32_pcomeqw (v8hi, v8hi) v16qi __builtin_ia32_pcomfalseb (v16qi, v16qi) v4si __builtin_ia32_pcomfalsed (v4si, v4si) v2di __builtin_ia32_pcomfalseq (v2di, v2di) v16qi __builtin_ia32_pcomfalseub (v16qi, v16qi) v4si __builtin_ia32_pcomfalseud (v4si, v4si) v2di __builtin_ia32_pcomfalseuq (v2di, v2di) v8hi __builtin_ia32_pcomfalseuw (v8hi, v8hi) v8hi __builtin_ia32_pcomfalsew (v8hi, v8hi) v16qi __builtin_ia32_pcomgeb (v16qi, v16qi) v4si __builtin_ia32_pcomged (v4si, v4si) v2di __builtin_ia32_pcomgeq (v2di, v2di) v16qi __builtin_ia32_pcomgeub (v16qi, v16qi) v4si __builtin_ia32_pcomgeud (v4si, v4si) v2di __builtin_ia32_pcomgeuq (v2di, v2di) v8hi __builtin_ia32_pcomgeuw (v8hi, v8hi) v8hi __builtin_ia32_pcomgew (v8hi, v8hi) v16qi __builtin_ia32_pcomgtb (v16qi, v16qi) v4si __builtin_ia32_pcomgtd (v4si, v4si) v2di __builtin_ia32_pcomgtq (v2di, v2di) v16qi __builtin_ia32_pcomgtub (v16qi, v16qi) v4si __builtin_ia32_pcomgtud (v4si, v4si) v2di __builtin_ia32_pcomgtuq (v2di, v2di) v8hi __builtin_ia32_pcomgtuw (v8hi, v8hi) v8hi __builtin_ia32_pcomgtw (v8hi, v8hi) v16qi __builtin_ia32_pcomleb (v16qi, v16qi) v4si __builtin_ia32_pcomled (v4si, v4si) v2di __builtin_ia32_pcomleq (v2di, v2di) v16qi __builtin_ia32_pcomleub (v16qi, v16qi) v4si __builtin_ia32_pcomleud (v4si, v4si) v2di __builtin_ia32_pcomleuq (v2di, v2di) v8hi __builtin_ia32_pcomleuw (v8hi, v8hi) v8hi __builtin_ia32_pcomlew (v8hi, v8hi) v16qi __builtin_ia32_pcomltb (v16qi, v16qi) v4si __builtin_ia32_pcomltd (v4si, v4si) v2di __builtin_ia32_pcomltq (v2di, v2di) v16qi __builtin_ia32_pcomltub (v16qi, v16qi) v4si __builtin_ia32_pcomltud (v4si, v4si) v2di __builtin_ia32_pcomltuq (v2di, v2di) v8hi __builtin_ia32_pcomltuw (v8hi, v8hi) v8hi __builtin_ia32_pcomltw (v8hi, v8hi) v16qi __builtin_ia32_pcomneb (v16qi, v16qi) v4si __builtin_ia32_pcomned (v4si, v4si) v2di __builtin_ia32_pcomneq (v2di, v2di) v16qi __builtin_ia32_pcomneub (v16qi, v16qi) v4si __builtin_ia32_pcomneud (v4si, v4si) v2di __builtin_ia32_pcomneuq (v2di, v2di) v8hi __builtin_ia32_pcomneuw (v8hi, v8hi) v8hi __builtin_ia32_pcomnew (v8hi, v8hi) v16qi __builtin_ia32_pcomtrueb (v16qi, v16qi) v4si __builtin_ia32_pcomtrued (v4si, v4si) v2di __builtin_ia32_pcomtrueq (v2di, v2di) v16qi __builtin_ia32_pcomtrueub (v16qi, v16qi) v4si __builtin_ia32_pcomtrueud (v4si, v4si) v2di __builtin_ia32_pcomtrueuq (v2di, v2di) v8hi __builtin_ia32_pcomtrueuw (v8hi, v8hi) v8hi __builtin_ia32_pcomtruew (v8hi, v8hi) v4df __builtin_ia32_permpd (v2df, v2df, v16qi) v4sf __builtin_ia32_permps (v4sf, v4sf, v16qi) v4si __builtin_ia32_phaddbd (v16qi) v2di __builtin_ia32_phaddbq (v16qi) v8hi __builtin_ia32_phaddbw (v16qi) v2di __builtin_ia32_phadddq (v4si) v4si __builtin_ia32_phaddubd (v16qi) v2di __builtin_ia32_phaddubq (v16qi) v8hi __builtin_ia32_phaddubw (v16qi) v2di __builtin_ia32_phaddudq (v4si) v4si __builtin_ia32_phadduwd (v8hi) v2di __builtin_ia32_phadduwq (v8hi) v4si __builtin_ia32_phaddwd (v8hi) v2di __builtin_ia32_phaddwq (v8hi) v8hi __builtin_ia32_phsubbw (v16qi) v2di __builtin_ia32_phsubdq (v4si) v4si __builtin_ia32_phsubwd (v8hi) v4si __builtin_ia32_pmacsdd (v4si, v4si, v4si) v2di __builtin_ia32_pmacsdqh (v4si, v4si, v2di) v2di __builtin_ia32_pmacsdql (v4si, v4si, v2di) v4si __builtin_ia32_pmacssdd (v4si, v4si, v4si) v2di __builtin_ia32_pmacssdqh (v4si, v4si, v2di) v2di __builtin_ia32_pmacssdql (v4si, v4si, v2di) v4si __builtin_ia32_pmacsswd (v8hi, v8hi, v4si) v8hi __builtin_ia32_pmacssww (v8hi, v8hi, v8hi) v4si __builtin_ia32_pmacswd (v8hi, v8hi, v4si) v8hi __builtin_ia32_pmacsww (v8hi, v8hi, v8hi) v4si __builtin_ia32_pmadcsswd (v8hi, v8hi, v4si) v4si __builtin_ia32_pmadcswd (v8hi, v8hi, v4si) v16qi __builtin_ia32_pperm (v16qi, v16qi, v16qi) v16qi __builtin_ia32_protb (v16qi, v16qi) v4si __builtin_ia32_protd (v4si, v4si) v2di __builtin_ia32_protq (v2di, v2di) v8hi __builtin_ia32_protw (v8hi, v8hi) v16qi __builtin_ia32_pshab (v16qi, v16qi) v4si __builtin_ia32_pshad (v4si, v4si) v2di __builtin_ia32_pshaq (v2di, v2di) v8hi __builtin_ia32_pshaw (v8hi, v8hi) v16qi __builtin_ia32_pshlb (v16qi, v16qi) v4si __builtin_ia32_pshld (v4si, v4si) v2di __builtin_ia32_pshlq (v2di, v2di) v8hi __builtin_ia32_pshlw (v8hi, v8hi) The following builtin-in functions are available when `-msse5' is used. The second argument must be an integer constant and generate the machine instruction that is part of the name with the `_imm' suffix removed. v16qi __builtin_ia32_protb_imm (v16qi, int) v4si __builtin_ia32_protd_imm (v4si, int) v2di __builtin_ia32_protq_imm (v2di, int) v8hi __builtin_ia32_protw_imm (v8hi, int) The following built-in functions are available when `-m3dnow' is used. All of them generate the machine instruction that is part of the name. void __builtin_ia32_femms (void) v8qi __builtin_ia32_pavgusb (v8qi, v8qi) v2si __builtin_ia32_pf2id (v2sf) v2sf __builtin_ia32_pfacc (v2sf, v2sf) v2sf __builtin_ia32_pfadd (v2sf, v2sf) v2si __builtin_ia32_pfcmpeq (v2sf, v2sf) v2si __builtin_ia32_pfcmpge (v2sf, v2sf) v2si __builtin_ia32_pfcmpgt (v2sf, v2sf) v2sf __builtin_ia32_pfmax (v2sf, v2sf) v2sf __builtin_ia32_pfmin (v2sf, v2sf) v2sf __builtin_ia32_pfmul (v2sf, v2sf) v2sf __builtin_ia32_pfrcp (v2sf) v2sf __builtin_ia32_pfrcpit1 (v2sf, v2sf) v2sf __builtin_ia32_pfrcpit2 (v2sf, v2sf) v2sf __builtin_ia32_pfrsqrt (v2sf) v2sf __builtin_ia32_pfrsqrtit1 (v2sf, v2sf) v2sf __builtin_ia32_pfsub (v2sf, v2sf) v2sf __builtin_ia32_pfsubr (v2sf, v2sf) v2sf __builtin_ia32_pi2fd (v2si) v4hi __builtin_ia32_pmulhrw (v4hi, v4hi) The following built-in functions are available when both `-m3dnow' and `-march=athlon' are used. All of them generate the machine instruction that is part of the name. v2si __builtin_ia32_pf2iw (v2sf) v2sf __builtin_ia32_pfnacc (v2sf, v2sf) v2sf __builtin_ia32_pfpnacc (v2sf, v2sf) v2sf __builtin_ia32_pi2fw (v2si) v2sf __builtin_ia32_pswapdsf (v2sf) v2si __builtin_ia32_pswapdsi (v2si)  File: gcc.info, Node: MIPS DSP Built-in Functions, Next: MIPS Paired-Single Support, Prev: X86 Built-in Functions, Up: Target Builtins 5.50.7 MIPS DSP Built-in Functions ---------------------------------- The MIPS DSP Application-Specific Extension (ASE) includes new instructions that are designed to improve the performance of DSP and media applications. It provides instructions that operate on packed 8-bit/16-bit integer data, Q7, Q15 and Q31 fractional data. GCC supports MIPS DSP operations using both the generic vector extensions (*note Vector Extensions::) and a collection of MIPS-specific built-in functions. Both kinds of support are enabled by the `-mdsp' command-line option. Revision 2 of the ASE was introduced in the second half of 2006. This revision adds extra instructions to the original ASE, but is otherwise backwards-compatible with it. You can select revision 2 using the command-line option `-mdspr2'; this option implies `-mdsp'. At present, GCC only provides support for operations on 32-bit vectors. The vector type associated with 8-bit integer data is usually called `v4i8', the vector type associated with Q7 is usually called `v4q7', the vector type associated with 16-bit integer data is usually called `v2i16', and the vector type associated with Q15 is usually called `v2q15'. They can be defined in C as follows: typedef signed char v4i8 __attribute__ ((vector_size(4))); typedef signed char v4q7 __attribute__ ((vector_size(4))); typedef short v2i16 __attribute__ ((vector_size(4))); typedef short v2q15 __attribute__ ((vector_size(4))); `v4i8', `v4q7', `v2i16' and `v2q15' values are initialized in the same way as aggregates. For example: v4i8 a = {1, 2, 3, 4}; v4i8 b; b = (v4i8) {5, 6, 7, 8}; v2q15 c = {0x0fcb, 0x3a75}; v2q15 d; d = (v2q15) {0.1234 * 0x1.0p15, 0.4567 * 0x1.0p15}; _Note:_ The CPU's endianness determines the order in which values are packed. On little-endian targets, the first value is the least significant and the last value is the most significant. The opposite order applies to big-endian targets. For example, the code above will set the lowest byte of `a' to `1' on little-endian targets and `4' on big-endian targets. _Note:_ Q7, Q15 and Q31 values must be initialized with their integer representation. As shown in this example, the integer representation of a Q7 value can be obtained by multiplying the fractional value by `0x1.0p7'. The equivalent for Q15 values is to multiply by `0x1.0p15'. The equivalent for Q31 values is to multiply by `0x1.0p31'. The table below lists the `v4i8' and `v2q15' operations for which hardware support exists. `a' and `b' are `v4i8' values, and `c' and `d' are `v2q15' values. C code MIPS instruction `a + b' `addu.qb' `c + d' `addq.ph' `a - b' `subu.qb' `c - d' `subq.ph' The table below lists the `v2i16' operation for which hardware support exists for the DSP ASE REV 2. `e' and `f' are `v2i16' values. C code MIPS instruction `e * f' `mul.ph' It is easier to describe the DSP built-in functions if we first define the following types: typedef int q31; typedef int i32; typedef unsigned int ui32; typedef long long a64; `q31' and `i32' are actually the same as `int', but we use `q31' to indicate a Q31 fractional value and `i32' to indicate a 32-bit integer value. Similarly, `a64' is the same as `long long', but we use `a64' to indicate values that will be placed in one of the four DSP accumulators (`$ac0', `$ac1', `$ac2' or `$ac3'). Also, some built-in functions prefer or require immediate numbers as parameters, because the corresponding DSP instructions accept both immediate numbers and register operands, or accept immediate numbers only. The immediate parameters are listed as follows. imm0_3: 0 to 3. imm0_7: 0 to 7. imm0_15: 0 to 15. imm0_31: 0 to 31. imm0_63: 0 to 63. imm0_255: 0 to 255. imm_n32_31: -32 to 31. imm_n512_511: -512 to 511. The following built-in functions map directly to a particular MIPS DSP instruction. Please refer to the architecture specification for details on what each instruction does. v2q15 __builtin_mips_addq_ph (v2q15, v2q15) v2q15 __builtin_mips_addq_s_ph (v2q15, v2q15) q31 __builtin_mips_addq_s_w (q31, q31) v4i8 __builtin_mips_addu_qb (v4i8, v4i8) v4i8 __builtin_mips_addu_s_qb (v4i8, v4i8) v2q15 __builtin_mips_subq_ph (v2q15, v2q15) v2q15 __builtin_mips_subq_s_ph (v2q15, v2q15) q31 __builtin_mips_subq_s_w (q31, q31) v4i8 __builtin_mips_subu_qb (v4i8, v4i8) v4i8 __builtin_mips_subu_s_qb (v4i8, v4i8) i32 __builtin_mips_addsc (i32, i32) i32 __builtin_mips_addwc (i32, i32) i32 __builtin_mips_modsub (i32, i32) i32 __builtin_mips_raddu_w_qb (v4i8) v2q15 __builtin_mips_absq_s_ph (v2q15) q31 __builtin_mips_absq_s_w (q31) v4i8 __builtin_mips_precrq_qb_ph (v2q15, v2q15) v2q15 __builtin_mips_precrq_ph_w (q31, q31) v2q15 __builtin_mips_precrq_rs_ph_w (q31, q31) v4i8 __builtin_mips_precrqu_s_qb_ph (v2q15, v2q15) q31 __builtin_mips_preceq_w_phl (v2q15) q31 __builtin_mips_preceq_w_phr (v2q15) v2q15 __builtin_mips_precequ_ph_qbl (v4i8) v2q15 __builtin_mips_precequ_ph_qbr (v4i8) v2q15 __builtin_mips_precequ_ph_qbla (v4i8) v2q15 __builtin_mips_precequ_ph_qbra (v4i8) v2q15 __builtin_mips_preceu_ph_qbl (v4i8) v2q15 __builtin_mips_preceu_ph_