-1ABI\s0 compliant at the cost of some performance loss,
specify \fB\-mno\-app\-regs\fR.  You should compile libraries and system
software with this option.
.IP "\fB\-mfpu\fR" 4
.IX Item "-mfpu"
.PD 0
.IP "\fB\-mhard\-float\fR" 4
.IX Item "-mhard-float"
.PD
Generate output containing floating point instructions.  This is the
default.
.IP "\fB\-mno\-fpu\fR" 4
.IX Item "-mno-fpu"
.PD 0
.IP "\fB\-msoft\-float\fR" 4
.IX Item "-msoft-float"
.PD
Generate output containing library calls for floating point.
\&\fBWarning:\fR the requisite libraries are not available for all \s-1SPARC\s0
targets.  Normally the facilities of the machine's usual C compiler are
used, but this cannot be done directly in cross-compilation.  You must make
your own arrangements to provide suitable library functions for
cross-compilation.  The embedded targets \fBsparc\-*\-aout\fR and
\&\fBsparclite\-*\-*\fR do provide software floating point support.
.Sp
\&\fB\-msoft\-float\fR changes the calling convention in the output file;
therefore, it is only useful if you compile \fIall\fR of a program with
this option.  In particular, you need to compile \fIlibgcc.a\fR, the
library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
this to work.
.IP "\fB\-mhard\-quad\-float\fR" 4
.IX Item "-mhard-quad-float"
Generate output containing quad-word (long double) floating point
instructions.
.IP "\fB\-msoft\-quad\-float\fR" 4
.IX Item "-msoft-quad-float"
Generate output containing library calls for quad-word (long double)
floating point instructions.  The functions called are those specified
in the \s-1SPARC\s0 \s-1ABI\s0.  This is the default.
.Sp
As of this writing, there are no \s-1SPARC\s0 implementations that have hardware
support for the quad-word floating point instructions.  They all invoke
a trap handler for one of these instructions, and then the trap handler
emulates the effect of the instruction.  Because of the trap handler overhead,
this is much slower than calling the \s-1ABI\s0 library routines.  Thus the
\&\fB\-msoft\-quad\-float\fR option is the default.
.IP "\fB\-mno\-unaligned\-doubles\fR" 4
.IX Item "-mno-unaligned-doubles"
.PD 0
.IP "\fB\-munaligned\-doubles\fR" 4
.IX Item "-munaligned-doubles"
.PD
Assume that doubles have 8 byte alignment.  This is the default.
.Sp
With \fB\-munaligned\-doubles\fR, \s-1GCC\s0 assumes that doubles have 8 byte
alignment only if they are contained in another type, or if they have an
absolute address.  Otherwise, it assumes they have 4 byte alignment.
Specifying this option avoids some rare compatibility problems with code
generated by other compilers.  It is not the default because it results
in a performance loss, especially for floating point code.
.IP "\fB\-mno\-faster\-structs\fR" 4
.IX Item "-mno-faster-structs"
.PD 0
.IP "\fB\-mfaster\-structs\fR" 4
.IX Item "-mfaster-structs"
.PD
With \fB\-mfaster\-structs\fR, the compiler assumes that structures
should have 8 byte alignment.  This enables the use of pairs of
\&\f(CW\*(C`ldd\*(C'\fR and \f(CW\*(C`std\*(C'\fR instructions for copies in structure
assignment, in place of twice as many \f(CW\*(C`ld\*(C'\fR and \f(CW\*(C`st\*(C'\fR pairs.
However, the use of this changed alignment directly violates the \s-1SPARC\s0
\&\s-1ABI\s0.  Thus, it's intended only for use on targets where the developer
acknowledges that their resulting code will not be directly in line with
the rules of the \s-1ABI\s0.
.IP "\fB\-mimpure\-text\fR" 4
.IX Item "-mimpure-text"
\&\fB\-mimpure\-text\fR, used in addition to \fB\-shared\fR, tells
the compiler to not pass \fB\-z text\fR to the linker when linking a
shared object.  Using this option, you can link position-dependent
code into a shared object.
.Sp
\&\fB\-mimpure\-text\fR suppresses the \*(L"relocations remain against
allocatable but non-writable sections\*(R" linker error message.
However, the necessary relocations will trigger copy-on-write, and the
shared object is not actually shared across processes.  Instead of
using \fB\-mimpure\-text\fR, you should compile all source code with
\&\fB\-fpic\fR or \fB\-fPIC\fR.
.Sp
This option is only available on SunOS and Solaris.
.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
.IX Item "-mcpu=cpu_type"
Set the instruction set, register set, and instruction scheduling parameters
for machine type \fIcpu_type\fR.  Supported values for \fIcpu_type\fR are
\&\fBv7\fR, \fBcypress\fR, \fBv8\fR, \fBsupersparc\fR, \fBsparclite\fR,
\&\fBf930\fR, \fBf934\fR, \fBhypersparc\fR, \fBsparclite86x\fR,
\&\fBsparclet\fR, \fBtsc701\fR, \fBv9\fR, \fBultrasparc\fR,
\&\fBultrasparc3\fR, \fBniagara\fR and \fBniagara2\fR.
.Sp
Default instruction scheduling parameters are used for values that select
an architecture and not an implementation.  These are \fBv7\fR, \fBv8\fR,
\&\fBsparclite\fR, \fBsparclet\fR, \fBv9\fR.
.Sp
Here is a list of each supported architecture and their supported
implementations.
.Sp
.Vb 5
\&            v7:             cypress
\&            v8:             supersparc, hypersparc
\&            sparclite:      f930, f934, sparclite86x
\&            sparclet:       tsc701
\&            v9:             ultrasparc, ultrasparc3, niagara, niagara2
.Ve
.Sp
By default (unless configured otherwise), \s-1GCC\s0 generates code for the V7
variant of the \s-1SPARC\s0 architecture.  With \fB\-mcpu=cypress\fR, the compiler
additionally optimizes it for the Cypress \s-1CY7C602\s0 chip, as used in the
SPARCStation/SPARCServer 3xx series.  This is also appropriate for the older
SPARCStation 1, 2, \s-1IPX\s0 etc.
.Sp
With \fB\-mcpu=v8\fR, \s-1GCC\s0 generates code for the V8 variant of the \s-1SPARC\s0
architecture.  The only difference from V7 code is that the compiler emits
the integer multiply and integer divide instructions which exist in \s-1SPARC\-V8\s0
but not in \s-1SPARC\-V7\s0.  With \fB\-mcpu=supersparc\fR, the compiler additionally
optimizes it for the SuperSPARC chip, as used in the SPARCStation 10, 1000 and
2000 series.
.Sp
With \fB\-mcpu=sparclite\fR, \s-1GCC\s0 generates code for the SPARClite variant of
the \s-1SPARC\s0 architecture.  This adds the integer multiply, integer divide step
and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClite but not in \s-1SPARC\-V7\s0.
With \fB\-mcpu=f930\fR, the compiler additionally optimizes it for the
Fujitsu \s-1MB86930\s0 chip, which is the original SPARClite, with no \s-1FPU\s0.  With
\&\fB\-mcpu=f934\fR, the compiler additionally optimizes it for the Fujitsu
\&\s-1MB86934\s0 chip, which is the more recent SPARClite with \s-1FPU\s0.
.Sp
With \fB\-mcpu=sparclet\fR, \s-1GCC\s0 generates code for the SPARClet variant of
the \s-1SPARC\s0 architecture.  This adds the integer multiply, multiply/accumulate,
integer divide step and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClet
but not in \s-1SPARC\-V7\s0.  With \fB\-mcpu=tsc701\fR, the compiler additionally
optimizes it for the \s-1TEMIC\s0 SPARClet chip.
.Sp
With \fB\-mcpu=v9\fR, \s-1GCC\s0 generates code for the V9 variant of the \s-1SPARC\s0
architecture.  This adds 64\-bit integer and floating-point move instructions,
3 additional floating-point condition code registers and conditional move
instructions.  With \fB\-mcpu=ultrasparc\fR, the compiler additionally
optimizes it for the Sun UltraSPARC I/II/IIi chips.  With
\&\fB\-mcpu=ultrasparc3\fR, the compiler additionally optimizes it for the
Sun UltraSPARC III/III+/IIIi/IIIi+/IV/IV+ chips.  With
\&\fB\-mcpu=niagara\fR, the compiler additionally optimizes it for
Sun UltraSPARC T1 chips.  With \fB\-mcpu=niagara2\fR, the compiler
additionally optimizes it for Sun UltraSPARC T2 chips.
.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
.IX Item "-mtune=cpu_type"
Set the instruction scheduling parameters for machine type
\&\fIcpu_type\fR, but do not set the instruction set or register set that the
option \fB\-mcpu=\fR\fIcpu_type\fR would.
.Sp
The same values for \fB\-mcpu=\fR\fIcpu_type\fR can be used for
\&\fB\-mtune=\fR\fIcpu_type\fR, but the only useful values are those
that select a particular cpu implementation.  Those are \fBcypress\fR,
\&\fBsupersparc\fR, \fBhypersparc\fR, \fBf930\fR, \fBf934\fR,
\&\fBsparclite86x\fR, \fBtsc701\fR, \fBultrasparc\fR,
\&\fBultrasparc3\fR, \fBniagara\fR, and \fBniagara2\fR.
.IP "\fB\-mv8plus\fR" 4
.IX Item "-mv8plus"
.PD 0
.IP "\fB\-mno\-v8plus\fR" 4
.IX Item "-mno-v8plus"
.PD
With \fB\-mv8plus\fR, \s-1GCC\s0 generates code for the \s-1SPARC\-V8+\s0 \s-1ABI\s0.  The
difference from the V8 \s-1ABI\s0 is that the global and out registers are
considered 64\-bit wide.  This is enabled by default on Solaris in 32\-bit
mode for all \s-1SPARC\-V9\s0 processors.
.IP "\fB\-mvis\fR" 4
.IX Item "-mvis"
.PD 0
.IP "\fB\-mno\-vis\fR" 4
.IX Item "-mno-vis"
.PD
With \fB\-mvis\fR, \s-1GCC\s0 generates code that takes advantage of the UltraSPARC
Visual Instruction Set extensions.  The default is \fB\-mno\-vis\fR.
.PP
These \fB\-m\fR options are supported in addition to the above
on \s-1SPARC\-V9\s0 processors in 64\-bit environments:
.IP "\fB\-mlittle\-endian\fR" 4
.IX Item "-mlittle-endian"
Generate code for a processor running in little-endian mode.  It is only
available for a few configurations and most notably not on Solaris and Linux.
.IP "\fB\-m32\fR" 4
.IX Item "-m32"
.PD 0
.IP "\fB\-m64\fR" 4
.IX Item "-m64"
.PD
Generate code for a 32\-bit or 64\-bit environment.
The 32\-bit environment sets int, long and pointer to 32 bits.
The 64\-bit environment sets int to 32 bits and long and pointer
to 64 bits.
.IP "\fB\-mcmodel=medlow\fR" 4
.IX Item "-mcmodel=medlow"
Generate code for the Medium/Low code model: 64\-bit addresses, programs
must be linked in the low 32 bits of memory.  Programs can be statically
or dynamically linked.
.IP "\fB\-mcmodel=medmid\fR" 4
.IX Item "-mcmodel=medmid"
Generate code for the Medium/Middle code model: 64\-bit addresses, programs
must be linked in the low 44 bits of memory, the text and data segments must
be less than 2GB in size and the data segment must be located within 2GB of
the text segment.
.IP "\fB\-mcmodel=medany\fR" 4
.IX Item "-mcmodel=medany"
Generate code for the Medium/Anywhere code model: 64\-bit addresses, programs
may be linked anywhere in memory, the text and data segments must be less
than 2GB in size and the data segment must be located within 2GB of the
text segment.
.IP "\fB\-mcmodel=embmedany\fR" 4
.IX Item "-mcmodel=embmedany"
Generate code for the Medium/Anywhere code model for embedded systems:
64\-bit addresses, the text and data segments must be less than 2GB in
size, both starting anywhere in memory (determined at link time).  The
global register \f(CW%g4\fR points to the base of the data segment.  Programs
are statically linked and \s-1PIC\s0 is not supported.
.IP "\fB\-mstack\-bias\fR" 4
.IX Item "-mstack-bias"
.PD 0
.IP "\fB\-mno\-stack\-bias\fR" 4
.IX Item "-mno-stack-bias"
.PD
With \fB\-mstack\-bias\fR, \s-1GCC\s0 assumes that the stack pointer, and
frame pointer if present, are offset by \-2047 which must be added back
when making stack frame references.  This is the default in 64\-bit mode.
Otherwise, assume no such offset is present.
.PP
These switches are supported in addition to the above on Solaris:
.IP "\fB\-threads\fR" 4
.IX Item "-threads"
Add support for multithreading using the Solaris threads library.  This
option sets flags for both the preprocessor and linker.  This option does
not affect the thread safety of object code produced by the compiler or
that of libraries supplied with it.
.IP "\fB\-pthreads\fR" 4
.IX Item "-pthreads"
Add support for multithreading using the \s-1POSIX\s0 threads library.  This
option sets flags for both the preprocessor and linker.  This option does
not affect the thread safety of object code produced  by the compiler or
that of libraries supplied with it.
.IP "\fB\-pthread\fR" 4
.IX Item "-pthread"
This is a synonym for \fB\-pthreads\fR.
.PP
\fI\s-1SPU\s0 Options\fR
.IX Subsection "SPU Options"
.PP
These \fB\-m\fR options are supported on the \s-1SPU:\s0
.IP "\fB\-mwarn\-reloc\fR" 4
.IX Item "-mwarn-reloc"
.PD 0
.IP "\fB\-merror\-reloc\fR" 4
.IX Item "-merror-reloc"
.PD
The loader for \s-1SPU\s0 does not handle dynamic relocations.  By default, \s-1GCC\s0
will give an error when it generates code that requires a dynamic
relocation.  \fB\-mno\-error\-reloc\fR disables the error,
\&\fB\-mwarn\-reloc\fR will generate a warning instead.
.IP "\fB\-msafe\-dma\fR" 4
.IX Item "-msafe-dma"
.PD 0
.IP "\fB\-munsafe\-dma\fR" 4
.IX Item "-munsafe-dma"
.PD
Instructions which initiate or test completion of \s-1DMA\s0 must not be
reordered with respect to loads and stores of the memory which is being
accessed.  Users typically address this problem using the volatile
keyword, but that can lead to inefficient code in places where the
memory is known to not change.  Rather than mark the memory as volatile
we treat the \s-1DMA\s0 instructions as potentially effecting all memory.  With
\&\fB\-munsafe\-dma\fR users must use the volatile keyword to protect
memory accesses.
.IP "\fB\-mbranch\-hints\fR" 4
.IX Item "-mbranch-hints"
By default, \s-1GCC\s0 will generate a branch hint instruction to avoid
pipeline stalls for always taken or probably taken branches.  A hint
will not be generated closer than 8 instructions away from its branch.
There is little reason to disable them, except for debugging purposes,
or to make an object a little bit smaller.
.IP "\fB\-msmall\-mem\fR" 4
.IX Item "-msmall-mem"
.PD 0
.IP "\fB\-mlarge\-mem\fR" 4
.IX Item "-mlarge-mem"
.PD
By default, \s-1GCC\s0 generates code assuming that addresses are never larger
than 18 bits.  With \fB\-mlarge\-mem\fR code is generated that assumes
a full 32 bit address.
.IP "\fB\-mstdmain\fR" 4
.IX Item "-mstdmain"
By default, \s-1GCC\s0 links against startup code that assumes the SPU-style
main function interface (which has an unconventional parameter list).
With \fB\-mstdmain\fR, \s-1GCC\s0 will link your program against startup
code that assumes a C99\-style interface to \f(CW\*(C`main\*(C'\fR, including a
local copy of \f(CW\*(C`argv\*(C'\fR strings.
.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
.IX Item "-mfixed-range=register-range"
Generate code treating the given register range as fixed registers.
A fixed register is one that the register allocator can not use.  This is
useful when compiling kernel code.  A register range is specified as
two registers separated by a dash.  Multiple register ranges can be
specified separated by a comma.
.IP "\fB\-mdual\-nops\fR" 4
.IX Item "-mdual-nops"
.PD 0
.IP "\fB\-mdual\-nops=\fR\fIn\fR" 4
.IX Item "-mdual-nops=n"
.PD
By default, \s-1GCC\s0 will insert nops to increase dual issue when it expects
it to increase performance.  \fIn\fR can be a value from 0 to 10.  A
smaller \fIn\fR will insert fewer nops.  10 is the default, 0 is the
same as \fB\-mno\-dual\-nops\fR.  Disabled with \fB\-Os\fR.
.IP "\fB\-mhint\-max\-nops=\fR\fIn\fR" 4
.IX Item "-mhint-max-nops=n"
Maximum number of nops to insert for a branch hint.  A branch hint must
be at least 8 instructions away from the branch it is effecting.  \s-1GCC\s0
will insert up to \fIn\fR nops to enforce this, otherwise it will not
generate the branch hint.
.IP "\fB\-mhint\-max\-distance=\fR\fIn\fR" 4
.IX Item "-mhint-max-distance=n"
The encoding of the branch hint instruction limits the hint to be within
256 instructions of the branch it is effecting.  By default, \s-1GCC\s0 makes
sure it is within 125.
.IP "\fB\-msafe\-hints\fR" 4
.IX Item "-msafe-hints"
Work around a hardware bug which causes the \s-1SPU\s0 to stall indefinitely.
By default, \s-1GCC\s0 will insert the \f(CW\*(C`hbrp\*(C'\fR instruction to make sure
this stall won't happen.
.PP
\fIOptions for System V\fR
.IX Subsection "Options for System V"
.PP
These additional options are available on System V Release 4 for
compatibility with other compilers on those systems:
.IP "\fB\-G\fR" 4
.IX Item "-G"
Create a shared object.
It is recommended that \fB\-symbolic\fR or \fB\-shared\fR be used instead.
.IP "\fB\-Qy\fR" 4
.IX Item "-Qy"
Identify the versions of each tool used by the compiler, in a
\&\f(CW\*(C`.ident\*(C'\fR assembler directive in the output.
.IP "\fB\-Qn\fR" 4
.IX Item "-Qn"
Refrain from adding \f(CW\*(C`.ident\*(C'\fR directives to the output file (this is
the default).
.IP "\fB\-YP,\fR\fIdirs\fR" 4
.IX Item "-YP,dirs"
Search the directories \fIdirs\fR, and no others, for libraries
specified with \fB\-l\fR.
.IP "\fB\-Ym,\fR\fIdir\fR" 4
.IX Item "-Ym,dir"
Look in the directory \fIdir\fR to find the M4 preprocessor.
The assembler uses this option.
.PP
\fIV850 Options\fR
.IX Subsection "V850 Options"
.PP
These \fB\-m\fR options are defined for V850 implementations:
.IP "\fB\-mlong\-calls\fR" 4
.IX Item "-mlong-calls"
.PD 0
.IP "\fB\-mno\-long\-calls\fR" 4
.IX Item "-mno-long-calls"
.PD
Treat all calls as being far away (near).  If calls are assumed to be
far away, the compiler will always load the functions address up into a
register, and call indirect through the pointer.
.IP "\fB\-mno\-ep\fR" 4
.IX Item "-mno-ep"
.PD 0
.IP "\fB\-mep\fR" 4
.IX Item "-mep"
.PD
Do not optimize (do optimize) basic blocks that use the same index
pointer 4 or more times to copy pointer into the \f(CW\*(C`ep\*(C'\fR register, and
use the shorter \f(CW\*(C`sld\*(C'\fR and \f(CW\*(C`sst\*(C'\fR instructions.  The \fB\-mep\fR
option is on by default if you optimize.
.IP "\fB\-mno\-prolog\-function\fR" 4
.IX Item "-mno-prolog-function"
.PD 0
.IP "\fB\-mprolog\-function\fR" 4
.IX Item "-mprolog-function"
.PD
Do not use (do use) external functions to save and restore registers
at the prologue and epilogue of a function.  The external functions
are slower, but use less code space if more than one function saves
the same number of registers.  The \fB\-mprolog\-function\fR option
is on by default if you optimize.
.IP "\fB\-mspace\fR" 4
.IX Item "-mspace"
Try to make the code as small as possible.  At present, this just turns
on the \fB\-mep\fR and \fB\-mprolog\-function\fR options.
.IP "\fB\-mtda=\fR\fIn\fR" 4
.IX Item "-mtda=n"
Put static or global variables whose size is \fIn\fR bytes or less into
the tiny data area that register \f(CW\*(C`ep\*(C'\fR points to.  The tiny data
area can hold up to 256 bytes in total (128 bytes for byte references).
.IP "\fB\-msda=\fR\fIn\fR" 4
.IX Item "-msda=n"
Put static or global variables whose size is \fIn\fR bytes or less into
the small data area that register \f(CW\*(C`gp\*(C'\fR points to.  The small data
area can hold up to 64 kilobytes.
.IP "\fB\-mzda=\fR\fIn\fR" 4
.IX Item "-mzda=n"
Put static or global variables whose size is \fIn\fR bytes or less into
the first 32 kilobytes of memory.
.IP "\fB\-mv850\fR" 4
.IX Item "-mv850"
Specify that the target processor is the V850.
.IP "\fB\-mbig\-switch\fR" 4
.IX Item "-mbig-switch"
Generate code suitable for big switch tables.  Use this option only if
the assembler/linker complain about out of range branches within a switch
table.
.IP "\fB\-mapp\-regs\fR" 4
.IX Item "-mapp-regs"
This option will cause r2 and r5 to be used in the code generated by
the compiler.  This setting is the default.
.IP "\fB\-mno\-app\-regs\fR" 4
.IX Item "-mno-app-regs"
This option will cause r2 and r5 to be treated as fixed registers.
.IP "\fB\-mv850e1\fR" 4
.IX Item "-mv850e1"
Specify that the target processor is the V850E1.  The preprocessor
constants \fB_\|_v850e1_\|_\fR and \fB_\|_v850e_\|_\fR will be defined if
this option is used.
.IP "\fB\-mv850e\fR" 4
.IX Item "-mv850e"
Specify that the target processor is the V850E.  The preprocessor
constant \fB_\|_v850e_\|_\fR will be defined if this option is used.
.Sp
If neither \fB\-mv850\fR nor \fB\-mv850e\fR nor \fB\-mv850e1\fR
are defined then a default target processor will be chosen and the
relevant \fB_\|_v850*_\|_\fR preprocessor constant will be defined.
.Sp
The preprocessor constants \fB_\|_v850\fR and \fB_\|_v851_\|_\fR are always
defined, regardless of which processor variant is the target.
.IP "\fB\-mdisable\-callt\fR" 4
.IX Item "-mdisable-callt"
This option will suppress generation of the \s-1CALLT\s0 instruction for the
v850e and v850e1 flavors of the v850 architecture.  The default is
\&\fB\-mno\-disable\-callt\fR which allows the \s-1CALLT\s0 instruction to be used.
.PP
\fI\s-1VAX\s0 Options\fR
.IX Subsection "VAX Options"
.PP
These \fB\-m\fR options are defined for the \s-1VAX:\s0
.IP "\fB\-munix\fR" 4
.IX Item "-munix"
Do not output certain jump instructions (\f(CW\*(C`aobleq\*(C'\fR and so on)
that the Unix assembler for the \s-1VAX\s0 cannot handle across long
ranges.
.IP "\fB\-mgnu\fR" 4
.IX Item "-mgnu"
Do output those jump instructions, on the assumption that you
will assemble with the \s-1GNU\s0 assembler.
.IP "\fB\-mg\fR" 4
.IX Item "-mg"
Output code for g\-format floating point numbers instead of d\-format.
.PP
\fIVxWorks Options\fR
.IX Subsection "VxWorks Options"
.PP
The options in this section are defined for all VxWorks targets.
Options specific to the target hardware are listed with the other
options for that target.
.IP "\fB\-mrtp\fR" 4
.IX Item "-mrtp"
\&\s-1GCC\s0 can generate code for both VxWorks kernels and real time processes
(RTPs).  This option switches from the former to the latter.  It also
defines the preprocessor macro \f(CW\*(C`_\|_RTP_\|_\*(C'\fR.
.IP "\fB\-non\-static\fR" 4
.IX Item "-non-static"
Link an \s-1RTP\s0 executable against shared libraries rather than static
libraries.  The options \fB\-static\fR and \fB\-shared\fR can
also be used for RTPs; \fB\-static\fR
is the default.
.IP "\fB\-Bstatic\fR" 4
.IX Item "-Bstatic"
.PD 0
.IP "\fB\-Bdynamic\fR" 4
.IX Item "-Bdynamic"
.PD
These options are passed down to the linker.  They are defined for
compatibility with Diab.
.IP "\fB\-Xbind\-lazy\fR" 4
.IX Item "-Xbind-lazy"
Enable lazy binding of function calls.  This option is equivalent to
\&\fB\-Wl,\-z,now\fR and is defined for compatibility with Diab.
.IP "\fB\-Xbind\-now\fR" 4
.IX Item "-Xbind-now"
Disable lazy binding of function calls.  This option is the default and
is defined for compatibility with Diab.
.PP
\fIx86\-64 Options\fR
.IX Subsection "x86-64 Options"
.PP
These are listed under
.PP
\fIXstormy16 Options\fR
.IX Subsection "Xstormy16 Options"
.PP
These options are defined for Xstormy16:
.IP "\fB\-msim\fR" 4
.IX Item "-msim"
Choose startup files and linker script suitable for the simulator.
.PP
\fIXtensa Options\fR
.IX Subsection "Xtensa Options"
.PP
These options are supported for Xtensa targets:
.IP "\fB\-mconst16\fR" 4
.IX Item "-mconst16"
.PD 0
.IP "\fB\-mno\-const16\fR" 4
.IX Item "-mno-const16"
.PD
Enable or disable use of \f(CW\*(C`CONST16\*(C'\fR instructions for loading
constant values.  The \f(CW\*(C`CONST16\*(C'\fR instruction is currently not a
standard option from Tensilica.  When enabled, \f(CW\*(C`CONST16\*(C'\fR
instructions are always used in place of the standard \f(CW\*(C`L32R\*(C'\fR
instructions.  The use of \f(CW\*(C`CONST16\*(C'\fR is enabled by default only if
the \f(CW\*(C`L32R\*(C'\fR instruction is not available.
.IP "\fB\-mfused\-madd\fR" 4
.IX Item "-mfused-madd"
.PD 0
.IP "\fB\-mno\-fused\-madd\fR" 4
.IX Item "-mno-fused-madd"
.PD
Enable or disable use of fused multiply/add and multiply/subtract
instructions in the floating-point option.  This has no effect if the
floating-point option is not also enabled.  Disabling fused multiply/add
and multiply/subtract instructions forces the compiler to use separate
instructions for the multiply and add/subtract operations.  This may be
desirable in some cases where strict \s-1IEEE\s0 754\-compliant results are
required: the fused multiply add/subtract instructions do not round the
intermediate result, thereby producing results with \fImore\fR bits of
precision than specified by the \s-1IEEE\s0 standard.  Disabling fused multiply
add/subtract instructions also ensures that the program output is not
sensitive to the compiler's ability to combine multiply and add/subtract
operations.
.IP "\fB\-mtext\-section\-literals\fR" 4
.IX Item "-mtext-section-literals"
.PD 0
.IP "\fB\-mno\-text\-section\-literals\fR" 4
.IX Item "-mno-text-section-literals"
.PD
Control the treatment of literal pools.  The default is
\&\fB\-mno\-text\-section\-literals\fR, which places literals in a separate
section in the output file.  This allows the literal pool to be placed
in a data \s-1RAM/ROM\s0, and it also allows the linker to combine literal
pools from separate object files to remove redundant literals and
improve code size.  With \fB\-mtext\-section\-literals\fR, the literals
are interspersed in the text section in order to keep them as close as
possible to their references.  This may be necessary for large assembly
files.
.IP "\fB\-mtarget\-align\fR" 4
.IX Item "-mtarget-align"
.PD 0
.IP "\fB\-mno\-target\-align\fR" 4
.IX Item "-mno-target-align"
.PD
When this option is enabled, \s-1GCC\s0 instructs the assembler to
automatically align instructions to reduce branch penalties at the
expense of some code density.  The assembler attempts to widen density
instructions to align branch targets and the instructions following call
instructions.  If there are not enough preceding safe density
instructions to align a target, no widening will be performed.  The
default is \fB\-mtarget\-align\fR.  These options do not affect the
treatment of auto-aligned instructions like \f(CW\*(C`LOOP\*(C'\fR, which the
assembler will always align, either by widening density instructions or
by inserting no-op instructions.
.IP "\fB\-mlongcalls\fR" 4
.IX Item "-mlongcalls"
.PD 0
.IP "\fB\-mno\-longcalls\fR" 4
.IX Item "-mno-longcalls"
.PD
When this option is enabled, \s-1GCC\s0 instructs the assembler to translate
direct calls to indirect calls unless it can determine that the target
of a direct call is in the range allowed by the call instruction.  This
translation typically occurs for calls to functions in other source
files.  Specifically, the assembler translates a direct \f(CW\*(C`CALL\*(C'\fR
instruction into an \f(CW\*(C`L32R\*(C'\fR followed by a \f(CW\*(C`CALLX\*(C'\fR instruction.
The default is \fB\-mno\-longcalls\fR.  This option should be used in
programs where the call target can potentially be out of range.  This
option is implemented in the assembler, not the compiler, so the
assembly code generated by \s-1GCC\s0 will still show direct call
instructions\-\-\-look at the disassembled object code to see the actual
instructions.  Note that the assembler will use an indirect call for
every cross-file call, not just those that really will be out of range.
.PP
\fIzSeries Options\fR
.IX Subsection "zSeries Options"
.PP
These are listed under
.Sh "Options for Code Generation Conventions"
.IX Subsection "Options for Code Generation Conventions"
These machine-independent options control the interface conventions
used in code generation.
.PP
Most of them have both positive and negative forms; the negative form
of \fB\-ffoo\fR would be \fB\-fno\-foo\fR.  In the table below, only
one of the forms is listed\-\-\-the one which is not the default.  You
can figure out the other form by either removing \fBno\-\fR or adding
it.
.IP "\fB\-fbounds\-check\fR" 4
.IX Item "-fbounds-check"
For front-ends that support it, generate additional code to check that
indices used to access arrays are within the declared range.  This is
currently only supported by the Java and Fortran front-ends, where
this option defaults to true and false respectively.
.IP "\fB\-ftrapv\fR" 4
.IX Item "-ftrapv"
This option generates traps for signed overflow on addition, subtraction,
multiplication operations.
.IP "\fB\-fwrapv\fR" 4
.IX Item "-fwrapv"
This option instructs the compiler to assume that signed arithmetic
overflow of addition, subtraction and multiplication wraps around
using twos-complement representation.  This flag enables some optimizations
and disables others.  This option is enabled by default for the Java
front-end, as required by the Java language specification.
.IP "\fB\-fexceptions\fR" 4
.IX Item "-fexceptions"
Enable exception handling.  Generates extra code needed to propagate
exceptions.  For some targets, this implies \s-1GCC\s0 will generate frame
unwind information for all functions, which can produce significant data
size overhead, although it does not affect execution.  If you do not
specify this option, \s-1GCC\s0 will enable it by default for languages like
\&\*(C+ which normally require exception handling, and disable it for
languages like C that do not normally require it.  However, you may need
to enable this option when compiling C code that needs to interoperate
properly with exception handlers written in \*(C+.  You may also wish to
disable this option if you are compiling older \*(C+ programs that don't
use exception handling.
.IP "\fB\-fnon\-call\-exceptions\fR" 4
.IX Item "-fnon-call-exceptions"
Generate code that allows trapping instructions to throw exceptions.
Note that this requires platform-specific runtime support that does
not exist everywhere.  Moreover, it only allows \fItrapping\fR
instructions to throw exceptions, i.e. memory references or floating
point instructions.  It does not allow exceptions to be thrown from
arbitrary signal handlers such as \f(CW\*(C`SIGALRM\*(C'\fR.
.IP "\fB\-funwind\-tables\fR" 4
.IX Item "-funwind-tables"
Similar to \fB\-fexceptions\fR, except that it will just generate any needed
static data, but will not affect the generated code in any other way.
You will normally not enable this option; instead, a language processor
that needs this handling would enable it on your behalf.
.IP "\fB\-fasynchronous\-unwind\-tables\fR" 4
.IX Item "-fasynchronous-unwind-tables"
Generate unwind table in dwarf2 format, if supported by target machine.  The
table is exact at each instruction boundary, so it can be used for stack
unwinding from asynchronous events (such as debugger or garbage collector).
.IP "\fB\-fpcc\-struct\-return\fR" 4
.IX Item "-fpcc-struct-return"
Return \*(L"short\*(R" \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in memory like
longer ones, rather than in registers.  This convention is less
efficient, but it has the advantage of allowing intercallability between
GCC-compiled files and files compiled with other compilers, particularly
the Portable C Compiler (pcc).
.Sp
The precise convention for returning structures in memory depends
on the target configuration macros.
.Sp
Short structures and unions are those whose size and alignment match
that of some integer type.
.Sp
\&\fBWarning:\fR code compiled with the \fB\-fpcc\-struct\-return\fR
switch is not binary compatible with code compiled with the
\&\fB\-freg\-struct\-return\fR switch.
Use it to conform to a non-default application binary interface.
.IP "\fB\-freg\-struct\-return\fR" 4
.IX Item "-freg-struct-return"
Return \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in registers when possible.
This is more efficient for small structures than
\&\fB\-fpcc\-struct\-return\fR.
.Sp
If you specify neither \fB\-fpcc\-struct\-return\fR nor
\&\fB\-freg\-struct\-return\fR, \s-1GCC\s0 defaults to whichever convention is
standard for the target.  If there is no standard convention, \s-1GCC\s0
defaults to \fB\-fpcc\-struct\-return\fR, except on targets where \s-1GCC\s0 is
the principal compiler.  In those cases, we can choose the standard, and
we chose the more efficient register return alternative.
.Sp
\&\fBWarning:\fR code compiled with the \fB\-freg\-struct\-return\fR
switch is not binary compatible with code compiled with the
\&\fB\-fpcc\-struct\-return\fR switch.
Use it to conform to a non-default application binary interface.
.IP "\fB\-fshort\-enums\fR" 4
.IX Item "-fshort-enums"
Allocate to an \f(CW\*(C`enum\*(C'\fR type only as many bytes as it needs for the
declared range of possible values.  Specifically, the \f(CW\*(C`enum\*(C'\fR type
will be equivalent to the smallest integer type which has enough room.
.Sp
\&\fBWarning:\fR the \fB\-fshort\-enums\fR switch causes \s-1GCC\s0 to generate
code that is not binary compatible with code generated without that switch.
Use it to conform to a non-default application binary interface.
.IP "\fB\-fshort\-double\fR" 4
.IX Item "-fshort-double"
Use the same size for \f(CW\*(C`double\*(C'\fR as for \f(CW\*(C`float\*(C'\fR.
.Sp
\&\fBWarning:\fR the \fB\-fshort\-double\fR switch causes \s-1GCC\s0 to generate
code that is not binary compatible with code generated without that switch.
Use it to conform to a non-default application binary interface.
.IP "\fB\-fshort\-wchar\fR" 4
.IX Item "-fshort-wchar"
Override the underlying type for \fBwchar_t\fR to be \fBshort
unsigned int\fR instead of the default for the target.  This option is
useful for building programs to run under \s-1WINE\s0.
.Sp
\&\fBWarning:\fR the \fB\-fshort\-wchar\fR switch causes \s-1GCC\s0 to generate
code that is not binary compatible with code generated without that switch.
Use it to conform to a non-default application binary interface.
.IP "\fB\-fno\-common\fR" 4
.IX Item "-fno-common"
In C, allocate even uninitialized global variables in the data section of the
object file, rather than generating them as common blocks.  This has the
effect that if the same variable is declared (without \f(CW\*(C`extern\*(C'\fR) in
two different compilations, you will get an error when you link them.
The only reason this might be useful is if you wish to verify that the
program will work on other systems which always work this way.
.IP "\fB\-fno\-ident\fR" 4
.IX Item "-fno-ident"
Ignore the \fB#ident\fR directive.
.IP "\fB\-finhibit\-size\-directive\fR" 4
.IX Item "-finhibit-size-directive"
Don't output a \f(CW\*(C`.size\*(C'\fR assembler directive, or anything else that
would cause trouble if the function is split in the middle, and the
two halves are placed at locations far apart in memory.  This option is
used when compiling \fIcrtstuff.c\fR; you should not need to use it
for anything else.
.IP "\fB\-fverbose\-asm\fR" 4
.IX Item "-fverbose-asm"
Put extra commentary information in the generated assembly code to
make it more readable.  This option is generally only of use to those
who actually need to read the generated assembly code (perhaps while
debugging the compiler itself).
.Sp
\&\fB\-fno\-verbose\-asm\fR, the default, causes the
extra information to be omitted and is useful when comparing two assembler
files.
.IP "\fB\-frecord\-gcc\-switches\fR" 4
.IX Item "-frecord-gcc-switches"
This switch causes the command line that was used to invoke the
compiler to be recorded into the object file that is being created.
This switch is only implemented on some targets and the exact format
of the recording is target and binary file format dependent, but it
usually takes the form of a section containing \s-1ASCII\s0 text.  This
switch is related to the \fB\-fverbose\-asm\fR switch, but that
switch only records information in the assembler output file as
comments, so it never reaches the object file.
.IP "\fB\-fpic\fR" 4
.IX Item "-fpic"
Generate position-independent code (\s-1PIC\s0) suitable for use in a shared
library, if supported for the target machine.  Such code accesses all
constant addresses through a global offset table (\s-1GOT\s0).  The dynamic
loader resolves the \s-1GOT\s0 entries when the program starts (the dynamic
loader is not part of \s-1GCC\s0; it is part of the operating system).  If
the \s-1GOT\s0 size for the linked executable exceeds a machine-specific
maximum size, you get an error message from the linker indicating that
\&\fB\-fpic\fR does not work; in that case, recompile with \fB\-fPIC\fR
instead.  (These maximums are 8k on the \s-1SPARC\s0 and 32k
on the m68k and \s-1RS/6000\s0.  The 386 has no such limit.)
.Sp
Position-independent code requires special support, and therefore works
only on certain machines.  For the 386, \s-1GCC\s0 supports \s-1PIC\s0 for System V
but not for the Sun 386i.  Code generated for the \s-1IBM\s0 \s-1RS/6000\s0 is always
position-independent.
.Sp
When this flag is set, the macros \f(CW\*(C`_\|_pic_\|_\*(C'\fR and \f(CW\*(C`_\|_PIC_\|_\*(C'\fR
are defined to 1.
.IP "\fB\-fPIC\fR" 4
.IX Item "-fPIC"
If supported for the target machine, emit position-independent code,
suitable for dynamic linking and avoiding any limit on the size of the
global offset table.  This option makes a difference on the m68k,
PowerPC and \s-1SPARC\s0.
.Sp
Position-independent code requires special support, and therefore works
only on certain machines.
.Sp
When this flag is set, the macros \f(CW\*(C`_\|_pic_\|_\*(C'\fR and \f(CW\*(C`_\|_PIC_\|_\*(C'\fR
are defined to 2.
.IP "\fB\-fpie\fR" 4
.IX Item "-fpie"
.PD 0
.IP "\fB\-fPIE\fR" 4
.IX Item "-fPIE"
.PD
These options are similar to \fB\-fpic\fR and \fB\-fPIC\fR, but
generated position independent code can be only linked into executables.
Usually these options are used when \fB\-pie\fR \s-1GCC\s0 option will be
used during linking.
.Sp
\&\fB\-fpie\fR and \fB\-fPIE\fR both define the macros
\&\f(CW\*(C`_\|_pie_\|_\*(C'\fR and \f(CW\*(C`_\|_PIE_\|_\*(C'\fR.  The macros have the value 1
for \fB\-fpie\fR and 2 for \fB\-fPIE\fR.
.IP "\fB\-fno\-jump\-tables\fR" 4
.IX Item "-fno-jump-tables"
Do not use jump tables for switch statements even where it would be
more efficient than other code generation strategies.  This option is
of use in conjunction with \fB\-fpic\fR or \fB\-fPIC\fR for
building code which forms part of a dynamic linker and cannot
reference the address of a jump table.  On some targets, jump tables
do not require a \s-1GOT\s0 and this option is not needed.
.IP "\fB\-ffixed\-\fR\fIreg\fR" 4
.IX Item "-ffixed-reg"
Treat the register named \fIreg\fR as a fixed register; generated code
should never refer to it (except perhaps as a stack pointer, frame
pointer or in some other fixed role).
.Sp
\&\fIreg\fR must be the name of a register.  The register names accepted
are machine-specific and are defined in the \f(CW\*(C`REGISTER_NAMES\*(C'\fR
macro in the machine description macro file.
.Sp
This flag does not have a negative form, because it specifies a
three-way choice.
.IP "\fB\-fcall\-used\-\fR\fIreg\fR" 4
.IX Item "-fcall-used-reg"
Treat the register named \fIreg\fR as an allocable register that is
clobbered by function calls.  It may be allocated for temporaries or
variables that do not live across a call.  Functions compiled this way
will not save and restore the register \fIreg\fR.
.Sp
It is an error to used this flag with the frame pointer or stack pointer.
Use of this flag for other registers that have fixed pervasive roles in
the machine's execution model will produce disastrous results.
.Sp
This flag does not have a negative form, because it specifies a
three-way choice.
.IP "\fB\-fcall\-saved\-\fR\fIreg\fR" 4
.IX Item "-fcall-saved-reg"
Treat the register named \fIreg\fR as an allocable register saved by
functions.  It may be allocated even for temporaries or variables that
live across a call.  Functions compiled this way will save and restore
the register \fIreg\fR if they use it.
.Sp
It is an error to used this flag with the frame pointer or stack pointer.
Use of this flag for other registers that have fixed pervasive roles in
the machine's execution model will produce disastrous results.
.Sp
A different sort of disaster will result from the use of this flag for
a register in which function values may be returned.
.Sp
This flag does not have a negative form, because it specifies a
three-way choice.
.IP "\fB\-fpack\-struct[=\fR\fIn\fR\fB]\fR" 4
.IX Item "-fpack-struct[=n]"
Without a value specified, pack all structure members together without
holes.  When a value is specified (which must be a small power of two), pack
structure members according to this value, representing the maximum
alignment (that is, objects with default alignment requirements larger than
this will be output potentially unaligned at the next fitting location.
.Sp
\&\fBWarning:\fR the \fB\-fpack\-struct\fR switch causes \s-1GCC\s0 to generate
code that is not binary compatible with code generated without that switch.
Additionally, it makes the code suboptimal.
Use it to conform to a non-default application binary interface.
.IP "\fB\-finstrument\-functions\fR" 4
.IX Item "-finstrument-functions"
Generate instrumentation calls for entry and exit to functions.  Just
after function entry and just before function exit, the following
profiling functions will be called with the address of the current
function and its call site.  (On some platforms,
\&\f(CW\*(C`_\|_builtin_return_address\*(C'\fR does not work beyond the current
function, so the call site information may not be available to the
profiling functions otherwise.)
.Sp
.Vb 4
\&        void _\|_cyg_profile_func_enter (void *this_fn,
\&                                       void *call_site);
\&        void _\|_cyg_profile_func_exit  (void *this_fn,
\&                                       void *call_site);
.Ve
.Sp
The first argument is the address of the start of the current function,
which may be looked up exactly in the symbol table.
.Sp
This instrumentation is also done for functions expanded inline in other
functions.  The profiling calls will indicate where, conceptually, the
inline function is entered and exited.  This means that addressable
versions of such functions must be available.  If all your uses of a
function are expanded inline, this may mean an additional expansion of
code size.  If you use \fBextern inline\fR in your C code, an
addressable version of such functions must be provided.  (This is
normally the case anyways, but if you get lucky and the optimizer always
expands the functions inline, you might have gotten away without
providing static copies.)
.Sp
A function may be given the attribute \f(CW\*(C`no_instrument_function\*(C'\fR, in
which case this instrumentation will not be done.  This can be used, for
example, for the profiling functions listed above, high-priority
interrupt routines, and any functions from which the profiling functions
cannot safely be called (perhaps signal handlers, if the profiling
routines generate output or allocate memory).
.IP "\fB\-finstrument\-functions\-exclude\-file\-list=\fR\fIfile\fR\fB,\fR\fIfile\fR\fB,...\fR" 4
.IX Item "-finstrument-functions-exclude-file-list=file,file,..."
Set the list of functions that are excluded from instrumentation (see
the description of \f(CW\*(C`\-finstrument\-functions\*(C'\fR).  If the file that
contains a function definition matches with one of \fIfile\fR, then
that function is not instrumented.  The match is done on substrings:
if the \fIfile\fR parameter is a substring of the file name, it is
considered to be a match.
.Sp
For example,
\&\f(CW\*(C`\-finstrument\-functions\-exclude\-file\-list=/bits/stl,include/sys\*(C'\fR
will exclude any inline function defined in files whose pathnames
contain \f(CW\*(C`/bits/stl\*(C'\fR or \f(CW\*(C`include/sys\*(C'\fR.
.Sp
If, for some reason, you want to include letter \f(CW\*(Aq,\*(Aq\fR in one of
\&\fIsym\fR, write \f(CW\*(Aq,\*(Aq\fR. For example,
\&\f(CW\*(C`\-finstrument\-functions\-exclude\-file\-list=\*(Aq,,tmp\*(Aq\*(C'\fR
(note the single quote surrounding the option).
.IP "\fB\-finstrument\-functions\-exclude\-function\-list=\fR\fIsym\fR\fB,\fR\fIsym\fR\fB,...\fR" 4
.IX Item "-finstrument-functions-exclude-function-list=sym,sym,..."
This is similar to \f(CW\*(C`\-finstrument\-functions\-exclude\-file\-list\*(C'\fR,
but this option sets the list of function names to be excluded from
instrumentation.  The function name to be matched is its user-visible
name, such as \f(CW\*(C`vector<int> blah(const vector<int> &)\*(C'\fR, not the
internal mangled name (e.g., \f(CW\*(C`_Z4blahRSt6vectorIiSaIiEE\*(C'\fR).  The
match is done on substrings: if the \fIsym\fR parameter is a substring
of the function name, it is considered to be a match.
.IP "\fB\-fstack\-check\fR" 4
.IX Item "-fstack-check"
Generate code to verify that you do not go beyond the boundary of the
stack.  You should specify this flag if you are running in an
environment with multiple threads, but only rarely need to specify it in
a single-threaded environment since stack overflow is automatically
detected on nearly all systems if there is only one stack.
.Sp
Note that this switch does not actually cause checking to be done; the
operating system must do that.  The switch causes generation of code
to ensure that the operating system sees the stack being extended.
.IP "\fB\-fstack\-limit\-register=\fR\fIreg\fR" 4
.IX Item "-fstack-limit-register=reg"
.PD 0
.IP "\fB\-fstack\-limit\-symbol=\fR\fIsym\fR" 4
.IX Item "-fstack-limit-symbol=sym"
.IP "\fB\-fno\-stack\-limit\fR" 4
.IX Item "-fno-stack-limit"
.PD
Generate code to ensure that the stack does not grow beyond a certain value,
either the value of a register or the address of a symbol.  If the stack
would grow beyond the value, a signal is raised.  For most targets,
the signal is raised before the stack overruns the boundary, so
it is possible to catch the signal without taking special precautions.
.Sp
For instance, if the stack starts at absolute address \fB0x80000000\fR
and grows downwards, you can use the flags
\&\fB\-fstack\-limit\-symbol=_\|_stack_limit\fR and
\&\fB\-Wl,\-\-defsym,_\|_stack_limit=0x7ffe0000\fR to enforce a stack limit
of 128KB.  Note that this may only work with the \s-1GNU\s0 linker.
.IP "\fB\-fargument\-alias\fR" 4
.IX Item "-fargument-alias"
.PD 0
.IP "\fB\-fargument\-noalias\fR" 4
.IX Item "-fargument-noalias"
.IP "\fB\-fargument\-noalias\-global\fR" 4
.IX Item "-fargument-noalias-global"
.IP "\fB\-fargument\-noalias\-anything\fR" 4
.IX Item "-fargument-noalias-anything"
.PD
Specify the possible relationships among parameters and between
parameters and global data.
.Sp
\&\fB\-fargument\-alias\fR specifies that arguments (parameters) may
alias each other and may alias global storage.\fB\-fargument\-noalias\fR specifies that arguments do not alias
each other, but may alias global storage.\fB\-fargument\-noalias\-global\fR specifies that arguments do not
alias each other and do not alias global storage.
\&\fB\-fargument\-noalias\-anything\fR specifies that arguments do not
alias any other storage.
.Sp
Each language will automatically use whatever option is required by
the language standard.  You should not need to use these options yourself.
.IP "\fB\-fleading\-underscore\fR" 4
.IX Item "-fleading-underscore"
This option and its counterpart, \fB\-fno\-leading\-underscore\fR, forcibly
change the way C symbols are represented in the object file.  One use
is to help link with legacy assembly code.
.Sp
\&\fBWarning:\fR the \fB\-fleading\-underscore\fR switch causes \s-1GCC\s0 to
generate code that is not binary compatible with code generated without that
switch.  Use it to conform to a non-default application binary interface.
Not all targets provide complete support for this switch.
.IP "\fB\-ftls\-model=\fR\fImodel\fR" 4
.IX Item "-ftls-model=model"
Alter the thread-local storage model to be used.
The \fImodel\fR argument should be one of \f(CW\*(C`global\-dynamic\*(C'\fR,
\&\f(CW\*(C`local\-dynamic\*(C'\fR, \f(CW\*(C`initial\-exec\*(C'\fR or \f(CW\*(C`local\-exec\*(C'\fR.
.Sp
The default without \fB\-fpic\fR is \f(CW\*(C`initial\-exec\*(C'\fR; with
\&\fB\-fpic\fR the default is \f(CW\*(C`global\-dynamic\*(C'\fR.
.IP "\fB\-fvisibility=\fR\fIdefault|internal|hidden|protected\fR" 4
.IX Item "-fvisibility=default|internal|hidden|protected"
Set the default \s-1ELF\s0 image symbol visibility to the specified option\-\-\-all
symbols will be marked with this unless overridden within the code.
Using this feature can very substantially improve linking and
load times of shared object libraries, produce more optimized
code, provide near-perfect \s-1API\s0 export and prevent symbol clashes.
It is \fBstrongly\fR recommended that you use this in any shared objects
you distribute.
.Sp
Despite the nomenclature, \f(CW\*(C`default\*(C'\fR always means public ie;
available to be linked against from outside the shared object.
\&\f(CW\*(C`protected\*(C'\fR and \f(CW\*(C`internal\*(C'\fR are pretty useless in real-world
usage so the only other commonly used option will be \f(CW\*(C`hidden\*(C'\fR.
The default if \fB\-fvisibility\fR isn't specified is
\&\f(CW\*(C`default\*(C'\fR, i.e., make every
symbol public\-\-\-this causes the same behavior as previous versions of
\&\s-1GCC\s0.
.Sp
A good explanation of the benefits offered by ensuring \s-1ELF\s0
symbols have the correct visibility is given by \*(L"How To Write
Shared Libraries\*(R" by Ulrich Drepper (which can be found at
<\fBhttp://people.redhat.com/~drepper/\fR>)\-\-\-however a superior
solution made possible by this option to marking things hidden when
the default is public is to make the default hidden and mark things
public.  This is the norm with \s-1DLL\s0's on Windows and with \fB\-fvisibility=hidden\fR
and \f(CW\*(C`_\|_attribute_\|_ ((visibility("default")))\*(C'\fR instead of
\&\f(CW\*(C`_\|_declspec(dllexport)\*(C'\fR you get almost identical semantics with
identical syntax.  This is a great boon to those working with
cross-platform projects.
.Sp
For those adding visibility support to existing code, you may find
\&\fB#pragma \s-1GCC\s0 visibility\fR of use.  This works by you enclosing
the declarations you wish to set visibility for with (for example)
\&\fB#pragma \s-1GCC\s0 visibility push(hidden)\fR and
\&\fB#pragma \s-1GCC\s0 visibility pop\fR.
Bear in mind that symbol visibility should be viewed \fBas
part of the \s-1API\s0 interface contract\fR and thus all new code should
always specify visibility when it is not the default ie; declarations
only for use within the local \s-1DSO\s0 should \fBalways\fR be marked explicitly
as hidden as so to avoid \s-1PLT\s0 indirection overheads\-\-\-making this
abundantly clear also aids readability and self-documentation of the code.
Note that due to \s-1ISO\s0 \*(C+ specification requirements, operator new and
operator delete must always be of default visibility.
.Sp
Be aware that headers from outside your project, in particular system
headers and headers from any other library you use, may not be
expecting to be compiled with visibility other than the default.  You
may need to explicitly say \fB#pragma \s-1GCC\s0 visibility push(default)\fR
before including any such headers.
.Sp
\&\fBextern\fR declarations are not affected by \fB\-fvisibility\fR, so
a lot of code can be recompiled with \fB\-fvisibility=hidden\fR with
no modifications.  However, this means that calls to \fBextern\fR
functions with no explicit visibility will use the \s-1PLT\s0, so it is more
effective to use \fB_\|_attribute ((visibility))\fR and/or
\&\fB#pragma \s-1GCC\s0 visibility\fR to tell the compiler which \fBextern\fR
declarations should be treated as hidden.
.Sp
Note that \fB\-fvisibility\fR does affect \*(C+ vague linkage
entities. This means that, for instance, an exception class that will
be thrown between DSOs must be explicitly marked with default
visibility so that the \fBtype_info\fR nodes will be unified between
the DSOs.
.Sp
An overview of these techniques, their benefits and how to use them
is at <\fBhttp://gcc.gnu.org/wiki/Visibility\fR>.
.SH "ENVIRONMENT"
.IX Header "ENVIRONMENT"
This section describes several environment variables that affect how \s-1GCC\s0
operates.  Some of them work by specifying directories or prefixes to use
when searching for various kinds of files.  Some are used to specify other
aspects of the compilation environment.
.PP
Note that you can also specify places to search using options such as
\&\fB\-B\fR, \fB\-I\fR and \fB\-L\fR.  These
take precedence over places specified using environment variables, which
in turn take precedence over those specified by the configuration of \s-1GCC\s0.
.IP "\fB\s-1LANG\s0\fR" 4
.IX Item "LANG"
.PD 0
.IP "\fB\s-1LC_CTYPE\s0\fR" 4
.IX Item "LC_CTYPE"
.IP "\fB\s-1LC_MESSAGES\s0\fR" 4
.IX Item "LC_MESSAGES"
.IP "\fB\s-1LC_ALL\s0\fR" 4
.IX Item "LC_ALL"
.PD
These environment variables control the way that \s-1GCC\s0 uses
localization information that allow \s-1GCC\s0 to work with different
national conventions.  \s-1GCC\s0 inspects the locale categories
\&\fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR if it has been configured to do
so.  These locale categories can be set to any value supported by your
installation.  A typical value is \fBen_GB.UTF\-8\fR for English in the United
Kingdom encoded in \s-1UTF\-8\s0.
.Sp
The \fB\s-1LC_CTYPE\s0\fR environment variable specifies character
classification.  \s-1GCC\s0 uses it to determine the character boundaries in
a string; this is needed for some multibyte encodings that contain quote
and escape characters that would otherwise be interpreted as a string
end or escape.
.Sp
The \fB\s-1LC_MESSAGES\s0\fR environment variable specifies the language to
use in diagnostic messages.
.Sp
If the \fB\s-1LC_ALL\s0\fR environment variable is set, it overrides the value
of \fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR; otherwise, \fB\s-1LC_CTYPE\s0\fR
and \fB\s-1LC_MESSAGES\s0\fR default to the value of the \fB\s-1LANG\s0\fR
environment variable.  If none of these variables are set, \s-1GCC\s0
defaults to traditional C English behavior.
.IP "\fB\s-1TMPDIR\s0\fR" 4
.IX Item "TMPDIR"
If \fB\s-1TMPDIR\s0\fR is set, it specifies the directory to use for temporary
files.  \s-1GCC\s0 uses temporary files to hold the output of one stage of
compilation which is to be used as input to the next stage: for example,
the output of the preprocessor, which is the input to the compiler
proper.
.IP "\fB\s-1GCC_EXEC_PREFIX\s0\fR" 4
.IX Item "GCC_EXEC_PREFIX"
If \fB\s-1GCC_EXEC_PREFIX\s0\fR is set, it specifies a prefix to use in the
names of the subprograms executed by the compiler.  No slash is added
when this prefix is combined with the name of a subprogram, but you can
specify a prefix that ends with a slash if you wish.
.Sp
If \fB\s-1GCC_EXEC_PREFIX\s0\fR is not set, \s-1GCC\s0 will attempt to figure out
an appropriate prefix to use based on the pathname it was invoked with.
.Sp
If \s-1GCC\s0 cannot find the subprogram using the specified prefix, it
tries looking in the usual places for the subprogram.
.Sp
The default value of \fB\s-1GCC_EXEC_PREFIX\s0\fR is
\&\fI\fIprefix\fI/lib/gcc/\fR where \fIprefix\fR is the prefix to
the installed compiler. In many cases \fIprefix\fR is the value
of \f(CW\*(C`prefix\*(C'\fR when you ran the \fIconfigure\fR script.
.Sp
Other prefixes specified with \fB\-B\fR take precedence over this prefix.
.Sp
This prefix is also used for finding files such as \fIcrt0.o\fR that are
used for linking.
.Sp
In addition, the prefix is used in an unusual way in finding the
directories to search for header files.  For each of the standard
directories whose name normally begins with \fB/usr/local/lib/gcc\fR
(more precisely, with the value of \fB\s-1GCC_INCLUDE_DIR\s0\fR), \s-1GCC\s0 tries
replacing that beginning with the specified prefix to produce an
alternate directory name.  Thus, with \fB\-Bfoo/\fR, \s-1GCC\s0 will search
\&\fIfoo/bar\fR where it would normally search \fI/usr/local/lib/bar\fR.
These alternate directories are searched first; the standard directories
come next. If a standard directory begins with the configured
\&\fIprefix\fR then the value of \fIprefix\fR is replaced by
\&\fB\s-1GCC_EXEC_PREFIX\s0\fR when looking for header files.
.IP "\fB\s-1COMPILER_PATH\s0\fR" 4
.IX Item "COMPILER_PATH"
The value of \fB\s-1COMPILER_PATH\s0\fR is a colon-separated list of
directories, much like \fB\s-1PATH\s0\fR.  \s-1GCC\s0 tries the directories thus
specified when searching for subprograms, if it can't find the
subprograms using \fB\s-1GCC_EXEC_PREFIX\s0\fR.
.IP "\fB\s-1LIBRARY_PATH\s0\fR" 4
.IX Item "LIBRARY_PATH"
The value of \fB\s-1LIBRARY_PATH\s0\fR is a colon-separated list of
directories, much like \fB\s-1PATH\s0\fR.  When configured as a native compiler,
\&\s-1GCC\s0 tries the directories thus specified when searching for special
linker files, if it can't find them using \fB\s-1GCC_EXEC_PREFIX\s0\fR.  Linking
using \s-1GCC\s0 also uses these directories when searching for ordinary
libraries for the \fB\-l\fR option (but directories specified with
\&\fB\-L\fR come first).
.IP "\fB\s-1LANG\s0\fR" 4
.IX Item "LANG"
This variable is used to pass locale information to the compiler.  One way in
which this information is used is to determine the character set to be used
when character literals, string literals and comments are parsed in C and \*(C+.
When the compiler is configured to allow multibyte characters,
the following values for \fB\s-1LANG\s0\fR are recognized:
.RS 4
.IP "\fBC\-JIS\fR" 4
.IX Item "C-JIS"
Recognize \s-1JIS\s0 characters.
.IP "\fBC\-SJIS\fR" 4
.IX Item "C-SJIS"
Recognize \s-1SJIS\s0 characters.
.IP "\fBC\-EUCJP\fR" 4
.IX Item "C-EUCJP"
Recognize \s-1EUCJP\s0 characters.
.RE
.RS 4
.Sp
If \fB\s-1LANG\s0\fR is not defined, or if it has some other value, then the
compiler will use mblen and mbtowc as defined by the default locale to
recognize and translate multibyte characters.
.RE
.PP
Some additional environments variables affect the behavior of the
preprocessor.
.IP "\fB\s-1CPATH\s0\fR" 4
.IX Item "CPATH"
.PD 0
.IP "\fBC_INCLUDE_PATH\fR" 4
.IX Item "C_INCLUDE_PATH"
.IP "\fB\s-1CPLUS_INCLUDE_PATH\s0\fR" 4
.IX Item "CPLUS_INCLUDE_PATH"
.IP "\fB\s-1OBJC_INCLUDE_PATH\s0\fR" 4
.IX Item "OBJC_INCLUDE_PATH"
.PD
Each variable's value is a list of directories separated by a special
character, much like \fB\s-1PATH\s0\fR, in which to look for header files.
The special character, \f(CW\*(C`PATH_SEPARATOR\*(C'\fR, is target-dependent and
determined at \s-1GCC\s0 build time.  For Microsoft Windows-based targets it is a
semicolon, and for almost all other targets it is a colon.
.Sp
\&\fB\s-1CPATH\s0\fR specifies a list of directories to be searched as if
specified with \fB\-I\fR, but after any paths given with \fB\-I\fR
options on the command line.  This environment variable is used
regardless of which language is being preprocessed.
.Sp
The remaining environment variables apply only when preprocessing the
particular language indicated.  Each specifies a list of directories
to be searched as if specified with \fB\-isystem\fR, but after any
paths given with \fB\-isystem\fR options on the command line.
.Sp
In all these variables, an empty element instructs the compiler to
search its current working directory.  Empty elements can appear at the
beginning or end of a path.  For instance, if the value of
\&\fB\s-1CPATH\s0\fR is \f(CW\*(C`:/special/include\*(C'\fR, that has the same
effect as \fB\-I.\ \-I/special/include\fR.
.IP "\fB\s-1DEPENDENCIES_OUTPUT\s0\fR" 4
.IX Item "DEPENDENCIES_OUTPUT"
If this variable is set, its value specifies how to output
dependencies for Make based on the non-system header files processed
by the compiler.  System header files are ignored in the dependency
output.
.Sp
The value of \fB\s-1DEPENDENCIES_OUTPUT\s0\fR can be just a file name, in
which case the Make rules are written to that file, guessing the target
name from the source file name.  Or the value can have the form
\&\fIfile\fR\fB \fR\fItarget\fR, in which case the rules are written to
file \fIfile\fR using \fItarget\fR as the target name.
.Sp
In other words, this environment variable is equivalent to combining
the options \fB\-MM\fR and \fB\-MF\fR,
with an optional \fB\-MT\fR switch too.
.IP "\fB\s-1SUNPRO_DEPENDENCIES\s0\fR" 4
.IX Item "SUNPRO_DEPENDENCIES"
This variable is the same as \fB\s-1DEPENDENCIES_OUTPUT\s0\fR (see above),
except that system header files are not ignored, so it implies
\&\fB\-M\fR rather than \fB\-MM\fR.  However, the dependence on the
main input file is omitted.
.SH "BUGS"
.IX Header "BUGS"
For instructions on reporting bugs, see
<\fBhttp://gcc.gnu.org/bugs.html\fR>.
.SH "FOOTNOTES"
.IX Header "FOOTNOTES"
.IP "1." 4
On some systems, \fBgcc \-shared\fR
needs to build supplementary stub code for constructors to work.  On
multi-libbed systems, \fBgcc \-shared\fR must select the correct support
libraries to link against.  Failing to supply the correct flags may lead
to subtle defects.  Supplying them in cases where they are not necessary
is innocuous.
.SH "SEE ALSO"
.IX Header "SEE ALSO"
\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
\&\fIcpp\fR\|(1), \fIgcov\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), \fIgdb\fR\|(1), \fIadb\fR\|(1), \fIdbx\fR\|(1), \fIsdb\fR\|(1)
and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIas\fR,
\&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
.SH "AUTHOR"
.IX Header "AUTHOR"
See the Info entry for \fBgcc\fR, or
<\fBhttp://gcc.gnu.org/onlinedocs/gcc/Contributors.html\fR>,
for contributors to \s-1GCC\s0.
.SH "COPYRIGHT"
.IX Header "COPYRIGHT"
Copyright (c) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
Free Software Foundation, Inc.
.PP
Permission is granted to copy, distribute and/or modify this document
under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.2 or
any later version published by the Free Software Foundation; with the
Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
Free Software\*(R", the Front-Cover texts being (a) (see below), and with
the Back-Cover Texts being (b) (see below).  A copy of the license is
included in the \fIgfdl\fR\|(7) man page.
.PP
(a) The \s-1FSF\s0's Front-Cover Text is:
.PP
.Vb 1
\&     A GNU Manual
.Ve
.PP
(b) The \s-1FSF\s0's Back-Cover Text is:
.PP
.Vb 3
\&     You have freedom to copy and modify this GNU Manual, like GNU
\&     software.  Copies published by the Free Software Foundation raise
\&     funds for GNU development.
.Ve
.SH "POD ERRORS"
.IX Header "POD ERRORS"
Hey! \fBThe above document had some coding errors, which are explained below:\fR
.IP "Around line 8201:" 4
.IX Item "Around line 8201:"
You can't have =items (as at line 8214) unless the first thing after the =over is an =item
3
.÷$..3
Tcl_DetachChannel.33
Tcl_UtfToExternal.33
Tcl_DiscardResult.33
Tcl_AppendObjToObj.33 
Tcl_SetByteArrayLength.33

Tcl_Gets.3	3
Tcl_FSLoadFile.33	
Tcl_Eof.3
3 
Tcl_CreateObjCommand.33
Tcl_GetString.33
TCL_MEM_DEBUG.33 
Tcl_CreateCloseHandler.3
3 
Tcl_CreateTimerHandler.33
Tcl_SplitPath.33 
Tcl_DumpActiveMemory.33
Tcl_ListObjIndex.33
Tcl_AttemptRealloc.33 
Tcl_UniCharCaseMatch.33
Tcl_GetSlave.33
Tcl_FindExecutable.33$
Tcl_ListObjAppendElement.33
Tcl_EventuallyFree.33
Tcl_SetDoubleObj.33
Tcl_VarEvalVA.33$
Tcl_AppendStringsToObjVA.33
Tcl_WriteObj.3	3
Tcl_FSFileAttrsGet.33
Tcl_EvalObjEx.33
Tcl_SetPanicProc.33 
Tcl_IsChannelShared.33
Tcl_Chdir.33
Tcl_ParseVar.3
3
Tcl_GetCommandName.33

Tcl_PanicVA.33
Tcl_Finalize.33,
Tcl_CreateThreadExitHandler.3'\"
'\" Copyright (c) 1996-1997 Sun Microsystems, Inc.
'\"
'\" See the file "license.terms" for information on usage and redistribution
'\" of this file, and for a DISCLAIMER OF ALL WARRANTIES.
'\"
'\" RCS: @(#) $Id: OpenFileChnl.3,v 1.20.2.4 2004/07/16 22:22:15 andreas_kupries Exp $
'\" The definitions below are for supplemental macros used in Tcl/Tk
'\" manual entries.
'\"
'\" .AP type name in/out ?indent?
'\"	Start paragraph describing an argument to a library procedure.
'\"	type is type of argument (int, etc.), in/out is either "in", "out",
'\"	or "in/out" to describe whether procedure reads or modifies arg,
'\"	and indent is equivalent to second arg of .IP (shouldn't ever be
'\"	needed;  use .AS below instead)
'\"
'\" .AS ?type? ?name?
'\"	Give maximum sizes of arguments for setting tab stops.  Type and
'\"	name are examples of largest possible arguments that will be passed
'\"	to .AP later.  If args are omitted, default tab stops are used.
'\"
'\" .BS
'\"	Start box enclosure.  From here until next .BE, everything will be
'\"	enclosed in one large box.
'\"
'\" .BE
'\"	End of box enclosure.
'\"
'\" .CS
'\"	Begin code excerpt.
'\"
'\" .CE
'\"	End code excerpt.
'\"
'\" .VS ?version? ?br?
'\"	Begin vertical sidebar, for use in marking newly-changed parts
'\"	of man pages.  The first argument is ignored and used for recording
'\"	the version when the .VS was added, so that the sidebars can be
'\"	found and removed when they reach a certain age.  If another argument
'\"	is present, then a line break is forced before starting the sidebar.
'\"
'\" .VE
'\"	End of vertical sidebar.
'\"
'\" .DS
'\"	Begin an indented unfilled display.
'\"
'\" .DE
'\"	End of indented unfilled display.
'\"
'\" .SO
'\"	Start of list of standard options for a Tk widget.  The
'\"	options follow on successive lines, in four columns separated
'\"	by tabs.
'\"
'\" .SE
'\"	End of list of standard options for a Tk widget.
'\"
'\" .OP cmdName dbName dbClass
'\"	Start of description of a specific option.  cmdName gives the
'\"	option's name as spec