mum
maximum\*(R" length specified in the C standard.  Modern compilers
generally allow string constants which are much longer than the
standard's minimum limit, but very portable programs should avoid
using longer strings.
.Sp
The limit applies \fIafter\fR string constant concatenation, and does
not count the trailing \s-1NUL\s0.  In C89, the limit was 509 characters; in
C99, it was raised to 4095.  \*(C+98 does not specify a normative
minimum maximum, so we do not diagnose overlength strings in \*(C+.
.Sp
This option is implied by \fB\-pedantic\fR, and can be disabled with
\&\fB\-Wno\-overlength\-strings\fR.
.Sh "Options for Debugging Your Program or \s-1GCC\s0"
.IX Subsection "Options for Debugging Your Program or GCC"
\&\s-1GCC\s0 has various special options that are used for debugging
either your program or \s-1GCC:\s0
.IP "\fB\-g\fR" 4
.IX Item "-g"
Produce debugging information in the operating system's native format
(stabs, \s-1COFF\s0, \s-1XCOFF\s0, or \s-1DWARF\s0 2).  \s-1GDB\s0 can work with this debugging
information.
.Sp
On most systems that use stabs format, \fB\-g\fR enables use of extra
debugging information that only \s-1GDB\s0 can use; this extra information
makes debugging work better in \s-1GDB\s0 but will probably make other debuggers
crash or
refuse to read the program.  If you want to control for certain whether
to generate the extra information, use \fB\-gstabs+\fR, \fB\-gstabs\fR,
\&\fB\-gxcoff+\fR, \fB\-gxcoff\fR, or \fB\-gvms\fR (see below).
.Sp
\&\s-1GCC\s0 allows you to use \fB\-g\fR with
\&\fB\-O\fR.  The shortcuts taken by optimized code may occasionally
produce surprising results: some variables you declared may not exist
at all; flow of control may briefly move where you did not expect it;
some statements may not be executed because they compute constant
results or their values were already at hand; some statements may
execute in different places because they were moved out of loops.
.Sp
Nevertheless it proves possible to debug optimized output.  This makes
it reasonable to use the optimizer for programs that might have bugs.
.Sp
The following options are useful when \s-1GCC\s0 is generated with the
capability for more than one debugging format.
.IP "\fB\-ggdb\fR" 4
.IX Item "-ggdb"
Produce debugging information for use by \s-1GDB\s0.  This means to use the
most expressive format available (\s-1DWARF\s0 2, stabs, or the native format
if neither of those are supported), including \s-1GDB\s0 extensions if at all
possible.
.IP "\fB\-gstabs\fR" 4
.IX Item "-gstabs"
Produce debugging information in stabs format (if that is supported),
without \s-1GDB\s0 extensions.  This is the format used by \s-1DBX\s0 on most \s-1BSD\s0
systems.  On \s-1MIPS\s0, Alpha and System V Release 4 systems this option
produces stabs debugging output which is not understood by \s-1DBX\s0 or \s-1SDB\s0.
On System V Release 4 systems this option requires the \s-1GNU\s0 assembler.
.IP "\fB\-feliminate\-unused\-debug\-symbols\fR" 4
.IX Item "-feliminate-unused-debug-symbols"
Produce debugging information in stabs format (if that is supported),
for only symbols that are actually used.
.IP "\fB\-femit\-class\-debug\-always\fR" 4
.IX Item "-femit-class-debug-always"
Instead of emitting debugging information for a \*(C+ class in only one
object file, emit it in all object files using the class.  This option
should be used only with debuggers that are unable to handle the way \s-1GCC\s0
normally emits debugging information for classes because using this
option will increase the size of debugging information by as much as a
factor of two.
.IP "\fB\-gstabs+\fR" 4
.IX Item "-gstabs+"
Produce debugging information in stabs format (if that is supported),
using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0).  The
use of these extensions is likely to make other debuggers crash or
refuse to read the program.
.IP "\fB\-gcoff\fR" 4
.IX Item "-gcoff"
Produce debugging information in \s-1COFF\s0 format (if that is supported).
This is the format used by \s-1SDB\s0 on most System V systems prior to
System V Release 4.
.IP "\fB\-gxcoff\fR" 4
.IX Item "-gxcoff"
Produce debugging information in \s-1XCOFF\s0 format (if that is supported).
This is the format used by the \s-1DBX\s0 debugger on \s-1IBM\s0 \s-1RS/6000\s0 systems.
.IP "\fB\-gxcoff+\fR" 4
.IX Item "-gxcoff+"
Produce debugging information in \s-1XCOFF\s0 format (if that is supported),
using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0).  The
use of these extensions is likely to make other debuggers crash or
refuse to read the program, and may cause assemblers other than the \s-1GNU\s0
assembler (\s-1GAS\s0) to fail with an error.
.IP "\fB\-gdwarf\-2\fR" 4
.IX Item "-gdwarf-2"
Produce debugging information in \s-1DWARF\s0 version 2 format (if that is
supported).  This is the format used by \s-1DBX\s0 on \s-1IRIX\s0 6.  With this
option, \s-1GCC\s0 uses features of \s-1DWARF\s0 version 3 when they are useful;
version 3 is upward compatible with version 2, but may still cause
problems for older debuggers.
.IP "\fB\-gvms\fR" 4
.IX Item "-gvms"
Produce debugging information in \s-1VMS\s0 debug format (if that is
supported).  This is the format used by \s-1DEBUG\s0 on \s-1VMS\s0 systems.
.IP "\fB\-g\fR\fIlevel\fR" 4
.IX Item "-glevel"
.PD 0
.IP "\fB\-ggdb\fR\fIlevel\fR" 4
.IX Item "-ggdblevel"
.IP "\fB\-gstabs\fR\fIlevel\fR" 4
.IX Item "-gstabslevel"
.IP "\fB\-gcoff\fR\fIlevel\fR" 4
.IX Item "-gcofflevel"
.IP "\fB\-gxcoff\fR\fIlevel\fR" 4
.IX Item "-gxcofflevel"
.IP "\fB\-gvms\fR\fIlevel\fR" 4
.IX Item "-gvmslevel"
.PD
Request debugging information and also use \fIlevel\fR to specify how
much information.  The default level is 2.
.Sp
Level 0 produces no debug information at all.  Thus, \fB\-g0\fR negates
\&\fB\-g\fR.
.Sp
Level 1 produces minimal information, enough for making backtraces in
parts of the program that you don't plan to debug.  This includes
descriptions of functions and external variables, but no information
about local variables and no line numbers.
.Sp
Level 3 includes extra information, such as all the macro definitions
present in the program.  Some debuggers support macro expansion when
you use \fB\-g3\fR.
.Sp
\&\fB\-gdwarf\-2\fR does not accept a concatenated debug level, because
\&\s-1GCC\s0 used to support an option \fB\-gdwarf\fR that meant to generate
debug information in version 1 of the \s-1DWARF\s0 format (which is very
different from version 2), and it would have been too confusing.  That
debug format is long obsolete, but the option cannot be changed now.
Instead use an additional \fB\-g\fR\fIlevel\fR option to change the
debug level for \s-1DWARF2\s0.
.IP "\fB\-feliminate\-dwarf2\-dups\fR" 4
.IX Item "-feliminate-dwarf2-dups"
Compress \s-1DWARF2\s0 debugging information by eliminating duplicated
information about each symbol.  This option only makes sense when
generating \s-1DWARF2\s0 debugging information with \fB\-gdwarf\-2\fR.
.IP "\fB\-femit\-struct\-debug\-baseonly\fR" 4
.IX Item "-femit-struct-debug-baseonly"
Emit debug information for struct-like types
only when the base name of the compilation source file
matches the base name of file in which the struct was defined.
.Sp
This option substantially reduces the size of debugging information,
but at significant potential loss in type information to the debugger.
See \fB\-femit\-struct\-debug\-reduced\fR for a less aggressive option.
See \fB\-femit\-struct\-debug\-detailed\fR for more detailed control.
.Sp
This option works only with \s-1DWARF\s0 2.
.IP "\fB\-femit\-struct\-debug\-reduced\fR" 4
.IX Item "-femit-struct-debug-reduced"
Emit debug information for struct-like types
only when the base name of the compilation source file
matches the base name of file in which the type was defined,
unless the struct is a template or defined in a system header.
.Sp
This option significantly reduces the size of debugging information,
with some potential loss in type information to the debugger.
See \fB\-femit\-struct\-debug\-baseonly\fR for a more aggressive option.
See \fB\-femit\-struct\-debug\-detailed\fR for more detailed control.
.Sp
This option works only with \s-1DWARF\s0 2.
.IP "\fB\-femit\-struct\-debug\-detailed\fR[\fB=\fR\fIspec-list\fR]" 4
.IX Item "-femit-struct-debug-detailed[=spec-list]"
Specify the struct-like types
for which the compiler will generate debug information.
The intent is to reduce duplicate struct debug information
between different object files within the same program.
.Sp
This option is a detailed version of
\&\fB\-femit\-struct\-debug\-reduced\fR and \fB\-femit\-struct\-debug\-baseonly\fR,
which will serve for most needs.
.Sp
A specification has the syntax
[\fBdir:\fR|\fBind:\fR][\fBord:\fR|\fBgen:\fR](\fBany\fR|\fBsys\fR|\fBbase\fR|\fBnone\fR)
.Sp
The optional first word limits the specification to
structs that are used directly (\fBdir:\fR) or used indirectly (\fBind:\fR).
A struct type is used directly when it is the type of a variable, member.
Indirect uses arise through pointers to structs.
That is, when use of an incomplete struct would be legal, the use is indirect.
An example is
\&\fBstruct one direct; struct two * indirect;\fR.
.Sp
The optional second word limits the specification to
ordinary structs (\fBord:\fR) or generic structs (\fBgen:\fR).
Generic structs are a bit complicated to explain.
For \*(C+, these are non-explicit specializations of template classes,
or non-template classes within the above.
Other programming languages have generics,
but \fB\-femit\-struct\-debug\-detailed\fR does not yet implement them.
.Sp
The third word specifies the source files for those
structs for which the compiler will emit debug information.
The values \fBnone\fR and \fBany\fR have the normal meaning.
The value \fBbase\fR means that
the base of name of the file in which the type declaration appears
must match the base of the name of the main compilation file.
In practice, this means that
types declared in \fIfoo.c\fR and \fIfoo.h\fR will have debug information,
but types declared in other header will not.
The value \fBsys\fR means those types satisfying \fBbase\fR
or declared in system or compiler headers.
.Sp
You may need to experiment to determine the best settings for your application.
.Sp
The default is \fB\-femit\-struct\-debug\-detailed=all\fR.
.Sp
This option works only with \s-1DWARF\s0 2.
.IP "\fB\-fno\-merge\-debug\-strings\fR" 4
.IX Item "-fno-merge-debug-strings"
Direct the linker to merge together strings which are identical in
different object files.  This is not supported by all assemblers or
linker.  This decreases the size of the debug information in the
output file at the cost of increasing link processing time.  This is
on by default.
.IP "\fB\-fdebug\-prefix\-map=\fR\fIold\fR\fB=\fR\fInew\fR" 4
.IX Item "-fdebug-prefix-map=old=new"
When compiling files in directory \fI\fIold\fI\fR, record debugging
information describing them as in \fI\fInew\fI\fR instead.
.IP "\fB\-p\fR" 4
.IX Item "-p"
Generate extra code to write profile information suitable for the
analysis program \fBprof\fR.  You must use this option when compiling
the source files you want data about, and you must also use it when
linking.
.IP "\fB\-pg\fR" 4
.IX Item "-pg"
Generate extra code to write profile information suitable for the
analysis program \fBgprof\fR.  You must use this option when compiling
the source files you want data about, and you must also use it when
linking.
.IP "\fB\-Q\fR" 4
.IX Item "-Q"
Makes the compiler print out each function name as it is compiled, and
print some statistics about each pass when it finishes.
.IP "\fB\-ftime\-report\fR" 4
.IX Item "-ftime-report"
Makes the compiler print some statistics about the time consumed by each
pass when it finishes.
.IP "\fB\-fmem\-report\fR" 4
.IX Item "-fmem-report"
Makes the compiler print some statistics about permanent memory
allocation when it finishes.
.IP "\fB\-fpre\-ipa\-mem\-report\fR" 4
.IX Item "-fpre-ipa-mem-report"
.PD 0
.IP "\fB\-fpost\-ipa\-mem\-report\fR" 4
.IX Item "-fpost-ipa-mem-report"
.PD
Makes the compiler print some statistics about permanent memory
allocation before or after interprocedural optimization.
.IP "\fB\-fprofile\-arcs\fR" 4
.IX Item "-fprofile-arcs"
Add code so that program flow \fIarcs\fR are instrumented.  During
execution the program records how many times each branch and call is
executed and how many times it is taken or returns.  When the compiled
program exits it saves this data to a file called
\&\fI\fIauxname\fI.gcda\fR for each source file.  The data may be used for
profile-directed optimizations (\fB\-fbranch\-probabilities\fR), or for
test coverage analysis (\fB\-ftest\-coverage\fR).  Each object file's
\&\fIauxname\fR is generated from the name of the output file, if
explicitly specified and it is not the final executable, otherwise it is
the basename of the source file.  In both cases any suffix is removed
(e.g. \fIfoo.gcda\fR for input file \fIdir/foo.c\fR, or
\&\fIdir/foo.gcda\fR for output file specified as \fB\-o dir/foo.o\fR).
.IP "\fB\-\-coverage\fR" 4
.IX Item "--coverage"
This option is used to compile and link code instrumented for coverage
analysis.  The option is a synonym for \fB\-fprofile\-arcs\fR
\&\fB\-ftest\-coverage\fR (when compiling) and \fB\-lgcov\fR (when
linking).  See the documentation for those options for more details.
.RS 4
.IP "\(bu" 4
Compile the source files with \fB\-fprofile\-arcs\fR plus optimization
and code generation options.  For test coverage analysis, use the
additional \fB\-ftest\-coverage\fR option.  You do not need to profile
every source file in a program.
.IP "\(bu" 4
Link your object files with \fB\-lgcov\fR or \fB\-fprofile\-arcs\fR
(the latter implies the former).
.IP "\(bu" 4
Run the program on a representative workload to generate the arc profile
information.  This may be repeated any number of times.  You can run
concurrent instances of your program, and provided that the file system
supports locking, the data files will be correctly updated.  Also
\&\f(CW\*(C`fork\*(C'\fR calls are detected and correctly handled (double counting
will not happen).
.IP "\(bu" 4
For profile-directed optimizations, compile the source files again with
the same optimization and code generation options plus
\&\fB\-fbranch\-probabilities\fR.
.IP "\(bu" 4
For test coverage analysis, use \fBgcov\fR to produce human readable
information from the \fI.gcno\fR and \fI.gcda\fR files.  Refer to the
\&\fBgcov\fR documentation for further information.
.RE
.RS 4
.Sp
With \fB\-fprofile\-arcs\fR, for each function of your program \s-1GCC\s0
creates a program flow graph, then finds a spanning tree for the graph.
Only arcs that are not on the spanning tree have to be instrumented: the
compiler adds code to count the number of times that these arcs are
executed.  When an arc is the only exit or only entrance to a block, the
instrumentation code can be added to the block; otherwise, a new basic
block must be created to hold the instrumentation code.
.RE
.IP "\fB\-ftest\-coverage\fR" 4
.IX Item "-ftest-coverage"
Produce a notes file that the \fBgcov\fR code-coverage utility can use to
show program coverage.  Each source file's note file is called
\&\fI\fIauxname\fI.gcno\fR.  Refer to the \fB\-fprofile\-arcs\fR option
above for a description of \fIauxname\fR and instructions on how to
generate test coverage data.  Coverage data will match the source files
more closely, if you do not optimize.
.IP "\fB\-fdbg\-cnt\-list\fR" 4
.IX Item "-fdbg-cnt-list"
Print the name and the counter upperbound for all debug counters.
.IP "\fB\-fdbg\-cnt=\fR\fIcounter-value-list\fR" 4
.IX Item "-fdbg-cnt=counter-value-list"
Set the internal debug counter upperbound. \fIcounter-value-list\fR 
is a comma-separated list of \fIname\fR:\fIvalue\fR pairs
which sets the upperbound of each debug counter \fIname\fR to \fIvalue\fR.
All debug counters have the initial upperbound of \fI\s-1UINT_MAX\s0\fR,
thus \fIdbg_cnt()\fR returns true always unless the upperbound is set by this option.
e.g. With \-fdbg\-cnt=dce:10,tail_call:0
dbg_cnt(dce) will return true only for first 10 invocations
and dbg_cnt(tail_call) will return false always.
.IP "\fB\-d\fR\fIletters\fR" 4
.IX Item "-dletters"
.PD 0
.IP "\fB\-fdump\-rtl\-\fR\fIpass\fR" 4
.IX Item "-fdump-rtl-pass"
.PD
Says to make debugging dumps during compilation at times specified by
\&\fIletters\fR.    This is used for debugging the RTL-based passes of the
compiler.  The file names for most of the dumps are made by appending a
pass number and a word to the \fIdumpname\fR.  \fIdumpname\fR is generated
from the name of the output file, if explicitly specified and it is not
an executable, otherwise it is the basename of the source file. These
switches may have different effects when \fB\-E\fR is used for
preprocessing.
.Sp
Most debug dumps can be enabled either passing a letter to the \fB\-d\fR
option, or with a long \fB\-fdump\-rtl\fR switch; here are the possible
letters for use in \fIletters\fR and \fIpass\fR, and their meanings:
.RS 4
.IP "\fB\-dA\fR" 4
.IX Item "-dA"
Annotate the assembler output with miscellaneous debugging information.
.IP "\fB\-dB\fR" 4
.IX Item "-dB"
.PD 0
.IP "\fB\-fdump\-rtl\-bbro\fR" 4
.IX Item "-fdump-rtl-bbro"
.PD
Dump after block reordering, to \fI\fIfile\fI.148r.bbro\fR.
.IP "\fB\-dc\fR" 4
.IX Item "-dc"
.PD 0
.IP "\fB\-fdump\-rtl\-combine\fR" 4
.IX Item "-fdump-rtl-combine"
.PD
Dump after the \s-1RTL\s0 instruction combination pass, to the file
\&\fI\fIfile\fI.129r.combine\fR.
.IP "\fB\-dC\fR" 4
.IX Item "-dC"
.PD 0
.IP "\fB\-fdump\-rtl\-ce1\fR" 4
.IX Item "-fdump-rtl-ce1"
.IP "\fB\-fdump\-rtl\-ce2\fR" 4
.IX Item "-fdump-rtl-ce2"
.PD
\&\fB\-dC\fR and \fB\-fdump\-rtl\-ce1\fR enable dumping after the
first if conversion, to the file \fI\fIfile\fI.117r.ce1\fR.  \fB\-dC\fR
and \fB\-fdump\-rtl\-ce2\fR enable dumping after the second if
conversion, to the file \fI\fIfile\fI.130r.ce2\fR.
.IP "\fB\-dd\fR" 4
.IX Item "-dd"
.PD 0
.IP "\fB\-fdump\-rtl\-btl\fR" 4
.IX Item "-fdump-rtl-btl"
.IP "\fB\-fdump\-rtl\-dbr\fR" 4
.IX Item "-fdump-rtl-dbr"
.PD
\&\fB\-dd\fR and \fB\-fdump\-rtl\-btl\fR enable dumping after branch
target load optimization, to \fI\fIfile\fI.31.btl\fR.  \fB\-dd\fR
and \fB\-fdump\-rtl\-dbr\fR enable dumping after delayed branch
scheduling, to \fI\fIfile\fI.36.dbr\fR.
.IP "\fB\-dD\fR" 4
.IX Item "-dD"
Dump all macro definitions, at the end of preprocessing, in addition to
normal output.
.IP "\fB\-dE\fR" 4
.IX Item "-dE"
.PD 0
.IP "\fB\-fdump\-rtl\-ce3\fR" 4
.IX Item "-fdump-rtl-ce3"
.PD
Dump after the third if conversion, to \fI\fIfile\fI.146r.ce3\fR.
.IP "\fB\-df\fR" 4
.IX Item "-df"
.PD 0
.IP "\fB\-fdump\-rtl\-cfg\fR" 4
.IX Item "-fdump-rtl-cfg"
.IP "\fB\-fdump\-rtl\-life\fR" 4
.IX Item "-fdump-rtl-life"
.PD
\&\fB\-df\fR and \fB\-fdump\-rtl\-cfg\fR enable dumping after control
and data flow analysis, to \fI\fIfile\fI.116r.cfg\fR.  \fB\-df\fR
and \fB\-fdump\-rtl\-cfg\fR enable dumping dump after life analysis,
to \fI\fIfile\fI.128r.life1\fR and \fI\fIfile\fI.135r.life2\fR.
.IP "\fB\-dg\fR" 4
.IX Item "-dg"
.PD 0
.IP "\fB\-fdump\-rtl\-greg\fR" 4
.IX Item "-fdump-rtl-greg"
.PD
Dump after global register allocation, to \fI\fIfile\fI.139r.greg\fR.
.IP "\fB\-dG\fR" 4
.IX Item "-dG"
.PD 0
.IP "\fB\-fdump\-rtl\-gcse\fR" 4
.IX Item "-fdump-rtl-gcse"
.IP "\fB\-fdump\-rtl\-bypass\fR" 4
.IX Item "-fdump-rtl-bypass"
.PD
\&\fB\-dG\fR and \fB\-fdump\-rtl\-gcse\fR enable dumping after \s-1GCSE\s0, to
\&\fI\fIfile\fI.114r.gcse\fR.  \fB\-dG\fR and \fB\-fdump\-rtl\-bypass\fR
enable dumping after jump bypassing and control flow optimizations, to
\&\fI\fIfile\fI.115r.bypass\fR.
.IP "\fB\-dh\fR" 4
.IX Item "-dh"
.PD 0
.IP "\fB\-fdump\-rtl\-eh\fR" 4
.IX Item "-fdump-rtl-eh"
.PD
Dump after finalization of \s-1EH\s0 handling code, to \fI\fIfile\fI.02.eh\fR.
.IP "\fB\-di\fR" 4
.IX Item "-di"
.PD 0
.IP "\fB\-fdump\-rtl\-sibling\fR" 4
.IX Item "-fdump-rtl-sibling"
.PD
Dump after sibling call optimizations, to \fI\fIfile\fI.106r.sibling\fR.
.IP "\fB\-dj\fR" 4
.IX Item "-dj"
.PD 0
.IP "\fB\-fdump\-rtl\-jump\fR" 4
.IX Item "-fdump-rtl-jump"
.PD
Dump after the first jump optimization, to \fI\fIfile\fI.112r.jump\fR.
.IP "\fB\-dk\fR" 4
.IX Item "-dk"
.PD 0
.IP "\fB\-fdump\-rtl\-stack\fR" 4
.IX Item "-fdump-rtl-stack"
.PD
Dump after conversion from \s-1GCC\s0's \*(L"flat register file\*(R" registers to the
x87's stack-like registers, to \fI\fIfile\fI.152r.stack\fR.
.IP "\fB\-dl\fR" 4
.IX Item "-dl"
.PD 0
.IP "\fB\-fdump\-rtl\-lreg\fR" 4
.IX Item "-fdump-rtl-lreg"
.PD
Dump after local register allocation, to \fI\fIfile\fI.138r.lreg\fR.
.IP "\fB\-dL\fR" 4
.IX Item "-dL"
.PD 0
.IP "\fB\-fdump\-rtl\-loop2\fR" 4
.IX Item "-fdump-rtl-loop2"
.PD
\&\fB\-dL\fR and \fB\-fdump\-rtl\-loop2\fR enable dumping after the
loop optimization pass, to \fI\fIfile\fI.119r.loop2\fR,
\&\fI\fIfile\fI.120r.loop2_init\fR,
\&\fI\fIfile\fI.121r.loop2_invariant\fR, and
\&\fI\fIfile\fI.125r.loop2_done\fR.
.IP "\fB\-dm\fR" 4
.IX Item "-dm"
.PD 0
.IP "\fB\-fdump\-rtl\-sms\fR" 4
.IX Item "-fdump-rtl-sms"
.PD
Dump after modulo scheduling, to \fI\fIfile\fI.136r.sms\fR.
.IP "\fB\-dM\fR" 4
.IX Item "-dM"
.PD 0
.IP "\fB\-fdump\-rtl\-mach\fR" 4
.IX Item "-fdump-rtl-mach"
.PD
Dump after performing the machine dependent reorganization pass, to
\&\fI\fIfile\fI.155r.mach\fR if that pass exists.
.IP "\fB\-dn\fR" 4
.IX Item "-dn"
.PD 0
.IP "\fB\-fdump\-rtl\-rnreg\fR" 4
.IX Item "-fdump-rtl-rnreg"
.PD
Dump after register renumbering, to \fI\fIfile\fI.147r.rnreg\fR.
.IP "\fB\-dN\fR" 4
.IX Item "-dN"
.PD 0
.IP "\fB\-fdump\-rtl\-regmove\fR" 4
.IX Item "-fdump-rtl-regmove"
.PD
Dump after the register move pass, to \fI\fIfile\fI.132r.regmove\fR.
.IP "\fB\-do\fR" 4
.IX Item "-do"
.PD 0
.IP "\fB\-fdump\-rtl\-postreload\fR" 4
.IX Item "-fdump-rtl-postreload"
.PD
Dump after post-reload optimizations, to \fI\fIfile\fI.24.postreload\fR.
.IP "\fB\-dr\fR" 4
.IX Item "-dr"
.PD 0
.IP "\fB\-fdump\-rtl\-expand\fR" 4
.IX Item "-fdump-rtl-expand"
.PD
Dump after \s-1RTL\s0 generation, to \fI\fIfile\fI.104r.expand\fR.
.IP "\fB\-dR\fR" 4
.IX Item "-dR"
.PD 0
.IP "\fB\-fdump\-rtl\-sched2\fR" 4
.IX Item "-fdump-rtl-sched2"
.PD
Dump after the second scheduling pass, to \fI\fIfile\fI.149r.sched2\fR.
.IP "\fB\-ds\fR" 4
.IX Item "-ds"
.PD 0
.IP "\fB\-fdump\-rtl\-cse\fR" 4
.IX Item "-fdump-rtl-cse"
.PD
Dump after \s-1CSE\s0 (including the jump optimization that sometimes follows
\&\s-1CSE\s0), to \fI\fIfile\fI.113r.cse\fR.
.IP "\fB\-dS\fR" 4
.IX Item "-dS"
.PD 0
.IP "\fB\-fdump\-rtl\-sched1\fR" 4
.IX Item "-fdump-rtl-sched1"
.PD
Dump after the first scheduling pass, to \fI\fIfile\fI.136r.sched1\fR.
.IP "\fB\-dt\fR" 4
.IX Item "-dt"
.PD 0
.IP "\fB\-fdump\-rtl\-cse2\fR" 4
.IX Item "-fdump-rtl-cse2"
.PD
Dump after the second \s-1CSE\s0 pass (including the jump optimization that
sometimes follows \s-1CSE\s0), to \fI\fIfile\fI.127r.cse2\fR.
.IP "\fB\-dT\fR" 4
.IX Item "-dT"
.PD 0
.IP "\fB\-fdump\-rtl\-tracer\fR" 4
.IX Item "-fdump-rtl-tracer"
.PD
Dump after running tracer, to \fI\fIfile\fI.118r.tracer\fR.
.IP "\fB\-dV\fR" 4
.IX Item "-dV"
.PD 0
.IP "\fB\-fdump\-rtl\-vpt\fR" 4
.IX Item "-fdump-rtl-vpt"
.IP "\fB\-fdump\-rtl\-vartrack\fR" 4
.IX Item "-fdump-rtl-vartrack"
.PD
\&\fB\-dV\fR and \fB\-fdump\-rtl\-vpt\fR enable dumping after the value
profile transformations, to \fI\fIfile\fI.10.vpt\fR.  \fB\-dV\fR
and \fB\-fdump\-rtl\-vartrack\fR enable dumping after variable tracking,
to \fI\fIfile\fI.154r.vartrack\fR.
.IP "\fB\-dw\fR" 4
.IX Item "-dw"
.PD 0
.IP "\fB\-fdump\-rtl\-flow2\fR" 4
.IX Item "-fdump-rtl-flow2"
.PD
Dump after the second flow pass, to \fI\fIfile\fI.142r.flow2\fR.
.IP "\fB\-dz\fR" 4
.IX Item "-dz"
.PD 0
.IP "\fB\-fdump\-rtl\-peephole2\fR" 4
.IX Item "-fdump-rtl-peephole2"
.PD
Dump after the peephole pass, to \fI\fIfile\fI.145r.peephole2\fR.
.IP "\fB\-dZ\fR" 4
.IX Item "-dZ"
.PD 0
.IP "\fB\-fdump\-rtl\-web\fR" 4
.IX Item "-fdump-rtl-web"
.PD
Dump after live range splitting, to \fI\fIfile\fI.126r.web\fR.
.IP "\fB\-da\fR" 4
.IX Item "-da"
.PD 0
.IP "\fB\-fdump\-rtl\-all\fR" 4
.IX Item "-fdump-rtl-all"
.PD
Produce all the dumps listed above.
.IP "\fB\-dH\fR" 4
.IX Item "-dH"
Produce a core dump whenever an error occurs.
.IP "\fB\-dm\fR" 4
.IX Item "-dm"
Print statistics on memory usage, at the end of the run, to
standard error.
.IP "\fB\-dp\fR" 4
.IX Item "-dp"
Annotate the assembler output with a comment indicating which
pattern and alternative was used.  The length of each instruction is
also printed.
.IP "\fB\-dP\fR" 4
.IX Item "-dP"
Dump the \s-1RTL\s0 in the assembler output as a comment before each instruction.
Also turns on \fB\-dp\fR annotation.
.IP "\fB\-dv\fR" 4
.IX Item "-dv"
For each of the other indicated dump files (either with \fB\-d\fR or
\&\fB\-fdump\-rtl\-\fR\fIpass\fR), dump a representation of the control flow
graph suitable for viewing with \s-1VCG\s0 to \fI\fIfile\fI.\fIpass\fI.vcg\fR.
.IP "\fB\-dx\fR" 4
.IX Item "-dx"
Just generate \s-1RTL\s0 for a function instead of compiling it.  Usually used
with \fBr\fR (\fB\-fdump\-rtl\-expand\fR).
.IP "\fB\-dy\fR" 4
.IX Item "-dy"
Dump debugging information during parsing, to standard error.
.RE
.RS 4
.RE
.IP "\fB\-fdump\-noaddr\fR" 4
.IX Item "-fdump-noaddr"
When doing debugging dumps (see \fB\-d\fR option above), suppress
address output.  This makes it more feasible to use diff on debugging
dumps for compiler invocations with different compiler binaries and/or
different text / bss / data / heap / stack / dso start locations.
.IP "\fB\-fdump\-unnumbered\fR" 4
.IX Item "-fdump-unnumbered"
When doing debugging dumps (see \fB\-d\fR option above), suppress instruction
numbers and address output.  This makes it more feasible to
use diff on debugging dumps for compiler invocations with different
options, in particular with and without \fB\-g\fR.
.IP "\fB\-fdump\-translation\-unit\fR (\*(C+ only)" 4
.IX Item "-fdump-translation-unit ( only)"
.PD 0
.IP "\fB\-fdump\-translation\-unit\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
.IX Item "-fdump-translation-unit-options ( only)"
.PD
Dump a representation of the tree structure for the entire translation
unit to a file.  The file name is made by appending \fI.tu\fR to the
source file name.  If the \fB\-\fR\fIoptions\fR form is used, \fIoptions\fR
controls the details of the dump as described for the
\&\fB\-fdump\-tree\fR options.
.IP "\fB\-fdump\-class\-hierarchy\fR (\*(C+ only)" 4
.IX Item "-fdump-class-hierarchy ( only)"
.PD 0
.IP "\fB\-fdump\-class\-hierarchy\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
.IX Item "-fdump-class-hierarchy-options ( only)"
.PD
Dump a representation of each class's hierarchy and virtual function
table layout to a file.  The file name is made by appending \fI.class\fR
to the source file name.  If the \fB\-\fR\fIoptions\fR form is used,
\&\fIoptions\fR controls the details of the dump as described for the
\&\fB\-fdump\-tree\fR options.
.IP "\fB\-fdump\-ipa\-\fR\fIswitch\fR" 4
.IX Item "-fdump-ipa-switch"
Control the dumping at various stages of inter-procedural analysis
language tree to a file.  The file name is generated by appending a switch
specific suffix to the source file name.  The following dumps are possible:
.RS 4
.IP "\fBall\fR" 4
.IX Item "all"
Enables all inter-procedural analysis dumps.
.IP "\fBcgraph\fR" 4
.IX Item "cgraph"
Dumps information about call-graph optimization, unused function removal,
and inlining decisions.
.IP "\fBinline\fR" 4
.IX Item "inline"
Dump after function inlining.
.RE
.RS 4
.RE
.IP "\fB\-fdump\-tree\-\fR\fIswitch\fR" 4
.IX Item "-fdump-tree-switch"
.PD 0
.IP "\fB\-fdump\-tree\-\fR\fIswitch\fR\fB\-\fR\fIoptions\fR" 4
.IX Item "-fdump-tree-switch-options"
.PD
Control the dumping at various stages of processing the intermediate
language tree to a file.  The file name is generated by appending a switch
specific suffix to the source file name.  If the \fB\-\fR\fIoptions\fR
form is used, \fIoptions\fR is a list of \fB\-\fR separated options that
control the details of the dump.  Not all options are applicable to all
dumps, those which are not meaningful will be ignored.  The following
options are available
.RS 4
.IP "\fBaddress\fR" 4
.IX Item "address"
Print the address of each node.  Usually this is not meaningful as it
changes according to the environment and source file.  Its primary use
is for tying up a dump file with a debug environment.
.IP "\fBslim\fR" 4
.IX Item "slim"
Inhibit dumping of members of a scope or body of a function merely
because that scope has been reached.  Only dump such items when they
are directly reachable by some other path.  When dumping pretty-printed
trees, this option inhibits dumping the bodies of control structures.
.IP "\fBraw\fR" 4
.IX Item "raw"
Print a raw representation of the tree.  By default, trees are
pretty-printed into a C\-like representation.
.IP "\fBdetails\fR" 4
.IX Item "details"
Enable more detailed dumps (not honored by every dump option).
.IP "\fBstats\fR" 4
.IX Item "stats"
Enable dumping various statistics about the pass (not honored by every dump
option).
.IP "\fBblocks\fR" 4
.IX Item "blocks"
Enable showing basic block boundaries (disabled in raw dumps).
.IP "\fBvops\fR" 4
.IX Item "vops"
Enable showing virtual operands for every statement.
.IP "\fBlineno\fR" 4
.IX Item "lineno"
Enable showing line numbers for statements.
.IP "\fBuid\fR" 4
.IX Item "uid"
Enable showing the unique \s-1ID\s0 (\f(CW\*(C`DECL_UID\*(C'\fR) for each variable.
.IP "\fBall\fR" 4
.IX Item "all"
Turn on all options, except \fBraw\fR, \fBslim\fR and \fBlineno\fR.
.RE
.RS 4
.Sp
The following tree dumps are possible:
.IP "\fBoriginal\fR" 4
.IX Item "original"
Dump before any tree based optimization, to \fI\fIfile\fI.original\fR.
.IP "\fBoptimized\fR" 4
.IX Item "optimized"
Dump after all tree based optimization, to \fI\fIfile\fI.optimized\fR.
.IP "\fBgimple\fR" 4
.IX Item "gimple"
Dump each function before and after the gimplification pass to a file.  The
file name is made by appending \fI.gimple\fR to the source file name.
.IP "\fBcfg\fR" 4
.IX Item "cfg"
Dump the control flow graph of each function to a file.  The file name is
made by appending \fI.cfg\fR to the source file name.
.IP "\fBvcg\fR" 4
.IX Item "vcg"
Dump the control flow graph of each function to a file in \s-1VCG\s0 format.  The
file name is made by appending \fI.vcg\fR to the source file name.  Note
that if the file contains more than one function, the generated file cannot
be used directly by \s-1VCG\s0.  You will need to cut and paste each function's
graph into its own separate file first.
.IP "\fBch\fR" 4
.IX Item "ch"
Dump each function after copying loop headers.  The file name is made by
appending \fI.ch\fR to the source file name.
.IP "\fBssa\fR" 4
.IX Item "ssa"
Dump \s-1SSA\s0 related information to a file.  The file name is made by appending
\&\fI.ssa\fR to the source file name.
.IP "\fBsalias\fR" 4
.IX Item "salias"
Dump structure aliasing variable information to a file.  This file name
is made by appending \fI.salias\fR to the source file name.
.IP "\fBalias\fR" 4
.IX Item "alias"
Dump aliasing information for each function.  The file name is made by
appending \fI.alias\fR to the source file name.
.IP "\fBccp\fR" 4
.IX Item "ccp"
Dump each function after \s-1CCP\s0.  The file name is made by appending
\&\fI.ccp\fR to the source file name.
.IP "\fBstoreccp\fR" 4
.IX Item "storeccp"
Dump each function after STORE-CCP.  The file name is made by appending
\&\fI.storeccp\fR to the source file name.
.IP "\fBpre\fR" 4
.IX Item "pre"
Dump trees after partial redundancy elimination.  The file name is made
by appending \fI.pre\fR to the source file name.
.IP "\fBfre\fR" 4
.IX Item "fre"
Dump trees after full redundancy elimination.  The file name is made
by appending \fI.fre\fR to the source file name.
.IP "\fBcopyprop\fR" 4
.IX Item "copyprop"
Dump trees after copy propagation.  The file name is made
by appending \fI.copyprop\fR to the source file name.
.IP "\fBstore_copyprop\fR" 4
.IX Item "store_copyprop"
Dump trees after store copy-propagation.  The file name is made
by appending \fI.store_copyprop\fR to the source file name.
.IP "\fBdce\fR" 4
.IX Item "dce"
Dump each function after dead code elimination.  The file name is made by
appending \fI.dce\fR to the source file name.
.IP "\fBmudflap\fR" 4
.IX Item "mudflap"
Dump each function after adding mudflap instrumentation.  The file name is
made by appending \fI.mudflap\fR to the source file name.
.IP "\fBsra\fR" 4
.IX Item "sra"
Dump each function after performing scalar replacement of aggregates.  The
file name is made by appending \fI.sra\fR to the source file name.
.IP "\fBsink\fR" 4
.IX Item "sink"
Dump each function after performing code sinking.  The file name is made
by appending \fI.sink\fR to the source file name.
.IP "\fBdom\fR" 4
.IX Item "dom"
Dump each function after applying dominator tree optimizations.  The file
name is made by appending \fI.dom\fR to the source file name.
.IP "\fBdse\fR" 4
.IX Item "dse"
Dump each function after applying dead store elimination.  The file
name is made by appending \fI.dse\fR to the source file name.
.IP "\fBphiopt\fR" 4
.IX Item "phiopt"
Dump each function after optimizing \s-1PHI\s0 nodes into straightline code.  The file
name is made by appending \fI.phiopt\fR to the source file name.
.IP "\fBforwprop\fR" 4
.IX Item "forwprop"
Dump each function after forward propagating single use variables.  The file
name is made by appending \fI.forwprop\fR to the source file name.
.IP "\fBcopyrename\fR" 4
.IX Item "copyrename"
Dump each function after applying the copy rename optimization.  The file
name is made by appending \fI.copyrename\fR to the source file name.
.IP "\fBnrv\fR" 4
.IX Item "nrv"
Dump each function after applying the named return value optimization on
generic trees.  The file name is made by appending \fI.nrv\fR to the source
file name.
.IP "\fBvect\fR" 4
.IX Item "vect"
Dump each function after applying vectorization of loops.  The file name is
made by appending \fI.vect\fR to the source file name.
.IP "\fBvrp\fR" 4
.IX Item "vrp"
Dump each function after Value Range Propagation (\s-1VRP\s0).  The file name
is made by appending \fI.vrp\fR to the source file name.
.IP "\fBall\fR" 4
.IX Item "all"
Enable all the available tree dumps with the flags provided in this option.
.RE
.RS 4
.RE
.IP "\fB\-ftree\-vectorizer\-verbose=\fR\fIn\fR" 4
.IX Item "-ftree-vectorizer-verbose=n"
This option controls the amount of debugging output the vectorizer prints.
This information is written to standard error, unless
\&\fB\-fdump\-tree\-all\fR or \fB\-fdump\-tree\-vect\fR is specified,
in which case it is output to the usual dump listing file, \fI.vect\fR.
For \fIn\fR=0 no diagnostic information is reported.
If \fIn\fR=1 the vectorizer reports each loop that got vectorized,
and the total number of loops that got vectorized.
If \fIn\fR=2 the vectorizer also reports non-vectorized loops that passed
the first analysis phase (vect_analyze_loop_form) \- i.e. countable,
inner-most, single-bb, single\-entry/exit loops.  This is the same verbosity
level that \fB\-fdump\-tree\-vect\-stats\fR uses.
Higher verbosity levels mean either more information dumped for each
reported loop, or same amount of information reported for more loops:
If \fIn\fR=3, alignment related information is added to the reports.
If \fIn\fR=4, data-references related information (e.g. memory dependences,
memory access-patterns) is added to the reports.
If \fIn\fR=5, the vectorizer reports also non-vectorized inner-most loops
that did not pass the first analysis phase (i.e., may not be countable, or
may have complicated control-flow).
If \fIn\fR=6, the vectorizer reports also non-vectorized nested loops.
For \fIn\fR=7, all the information the vectorizer generates during its
analysis and transformation is reported.  This is the same verbosity level
that \fB\-fdump\-tree\-vect\-details\fR uses.
.IP "\fB\-frandom\-seed=\fR\fIstring\fR" 4
.IX Item "-frandom-seed=string"
This option provides a seed that \s-1GCC\s0 uses when it would otherwise use
random numbers.  It is used to generate certain symbol names
that have to be different in every compiled file.  It is also used to
place unique stamps in coverage data files and the object files that
produce them.  You can use the \fB\-frandom\-seed\fR option to produce
reproducibly identical object files.
.Sp
The \fIstring\fR should be different for every file you compile.
.IP "\fB\-fsched\-verbose=\fR\fIn\fR" 4
.IX Item "-fsched-verbose=n"
On targets that use instruction scheduling, this option controls the
amount of debugging output the scheduler prints.  This information is
written to standard error, unless \fB\-dS\fR or \fB\-dR\fR is
specified, in which case it is output to the usual dump
listing file, \fI.sched\fR or \fI.sched2\fR respectively.  However
for \fIn\fR greater than nine, the output is always printed to standard
error.
.Sp
For \fIn\fR greater than zero, \fB\-fsched\-verbose\fR outputs the
same information as \fB\-dRS\fR.  For \fIn\fR greater than one, it
also output basic block probabilities, detailed ready list information
and unit/insn info.  For \fIn\fR greater than two, it includes \s-1RTL\s0
at abort point, control-flow and regions info.  And for \fIn\fR over
four, \fB\-fsched\-verbose\fR also includes dependence info.
.IP "\fB\-save\-temps\fR" 4
.IX Item "-save-temps"
Store the usual \*(L"temporary\*(R" intermediate files permanently; place them
in the current directory and name them based on the source file.  Thus,
compiling \fIfoo.c\fR with \fB\-c \-save\-temps\fR would produce files
\&\fIfoo.i\fR and \fIfoo.s\fR, as well as \fIfoo.o\fR.  This creates a
preprocessed \fIfoo.i\fR output file even though the compiler now
normally uses an integrated preprocessor.
.Sp
When used in combination with the \fB\-x\fR command line option,
\&\fB\-save\-temps\fR is sensible enough to avoid over writing an
input source file with the same extension as an intermediate file.
The corresponding intermediate file may be obtained by renaming the
source file before using \fB\-save\-temps\fR.
.IP "\fB\-time\fR" 4
.IX Item "-time"
Report the \s-1CPU\s0 time taken by each subprocess in the compilation
sequence.  For C source files, this is the compiler proper and assembler
(plus the linker if linking is done).  The output looks like this:
.Sp
.Vb 2
\&        # cc1 0.12 0.01
\&        # as 0.00 0.01
.Ve
.Sp
The first number on each line is the \*(L"user time\*(R", that is time spent
executing the program itself.  The second number is \*(L"system time\*(R",
time spent executing operating system routines on behalf of the program.
Both numbers are in seconds.
.IP "\fB\-fvar\-tracking\fR" 4
.IX Item "-fvar-tracking"
Run variable tracking pass.  It computes where variables are stored at each
position in code.  Better debugging information is then generated
(if the debugging information format supports this information).
.Sp
It is enabled by default when compiling with optimization (\fB\-Os\fR,
\&\fB\-O\fR, \fB\-O2\fR, ...), debugging information (\fB\-g\fR) and
the debug info format supports it.
.IP "\fB\-print\-file\-name=\fR\fIlibrary\fR" 4
.IX Item "-print-file-name=library"
Print the full absolute name of the library file \fIlibrary\fR that
would be used when linking\-\-\-and don't do anything else.  With this
option, \s-1GCC\s0 does not compile or link anything; it just prints the
file name.
.IP "\fB\-print\-multi\-directory\fR" 4
.IX Item "-print-multi-directory"
Print the directory name corresponding to the multilib selected by any
other switches present in the command line.  This directory is supposed
to exist in \fB\s-1GCC_EXEC_PREFIX\s0\fR.
.IP "\fB\-print\-multi\-lib\fR" 4
.IX Item "-print-multi-lib"
Print the mapping from multilib directory names to compiler switches
that enable them.  The directory name is separated from the switches by
\&\fB;\fR, and each switch starts with an \fB@} instead of the
\&\f(CB@samp\fB{\-\fR, without spaces between multiple switches.  This is supposed to
ease shell-processing.
.IP "\fB\-print\-prog\-name=\fR\fIprogram\fR" 4
.IX Item "-print-prog-name=program"
Like \fB\-print\-file\-name\fR, but searches for a program such as \fBcpp\fR.
.IP "\fB\-print\-libgcc\-file\-name\fR" 4
.IX Item "-print-libgcc-file-name"
Same as \fB\-print\-file\-name=libgcc.a\fR.
.Sp
This is useful when you use \fB\-nostdlib\fR or \fB\-nodefaultlibs\fR
but you do want to link with \fIlibgcc.a\fR.  You can do
.Sp
.Vb 1
\&        gcc \-nostdlib <files>... \`gcc \-print\-libgcc\-file\-name\`
.Ve
.IP "\fB\-print\-search\-dirs\fR" 4
.IX Item "-print-search-dirs"
Print the name of the configured installation directory and a list of
program and library directories \fBgcc\fR will search\-\-\-and don't do anything else.
.Sp
This is useful when \fBgcc\fR prints the error message
\&\fBinstallation problem, cannot exec cpp0: No such file or directory\fR.
To resolve this you either need to put \fIcpp0\fR and the other compiler
components where \fBgcc\fR expects to find them, or you can set the environment
variable \fB\s-1GCC_EXEC_PREFIX\s0\fR to the directory where you installed them.
Don't forget the trailing \fB/\fR.
.IP "\fB\-print\-sysroot\-headers\-suffix\fR" 4
.IX Item "-print-sysroot-headers-suffix"
Print the suffix added to the target sysroot when searching for
headers, or give an error if the compiler is not configured with such
a suffix\-\-\-and don't do anything else.
.IP "\fB\-dumpmachine\fR" 4
.IX Item "-dumpmachine"
Print the compiler's target machine (for example,
\&\fBi686\-pc\-linux\-gnu\fR)\-\-\-and don't do anything else.
.IP "\fB\-dumpversion\fR" 4
.IX Item "-dumpversion"
Print the compiler version (for example, \fB3.0\fR)\-\-\-and don't do
anything else.
.IP "\fB\-dumpspecs\fR" 4
.IX Item "-dumpspecs"
Print the compiler's built-in specs\-\-\-and don't do anything else.  (This
is used when \s-1GCC\s0 itself is being built.)
.IP "\fB\-feliminate\-unused\-debug\-types\fR" 4
.IX Item "-feliminate-unused-debug-types"
Normally, when producing \s-1DWARF2\s0 output, \s-1GCC\s0 will emit debugging
information for all types declared in a compilation
unit, regardless of whether or not they are actually used
in that compilation unit.  Sometimes this is useful, such as
if, in the debugger, you want to cast a value to a type that is
not actually used in your program (but is declared).  More often,
however, this results in a significant amount of wasted space.
With this option, \s-1GCC\s0 will avoid producing debug symbol output
for types that are nowhere used in the source file being compiled.
.Sh "Options That Control Optimization"
.IX Subsection "Options That Control Optimization"
These options control various sorts of optimizations.
.PP
Without any optimization option, the compiler's goal is to reduce the
cost of compilation and to make debugging produce the expected
results.  Statements are independent: if you stop the program with a
breakpoint between statements, you can then assign a new value to any
variable or change the program counter to any other statement in the
function and get exactly the results you would expect from the source
code.
.PP
Turning on optimization flags makes the compiler attempt to improve
the performance and/or code size at the expense of compilation time
and possibly the ability to debug the program.
.PP
The compiler performs optimization based on the knowledge it has of
the program.  Optimization levels \fB\-O\fR and above, in
particular, enable \fIunit-at-a-time\fR mode, which allows the
compiler to consider information gained from later functions in
the file when compiling a function.  Compiling multiple files at
once to a single output file in \fIunit-at-a-time\fR mode allows
the compiler to use information gained from all of the files when
compiling each of them.
.PP
Not all optimizations are controlled directly by a flag.  Only
optimizations that have a flag are listed.
.IP "\fB\-O\fR" 4
.IX Item "-O"
.PD 0
.IP "\fB\-O1\fR" 4
.IX Item "-O1"
.PD
Optimize.  Optimizing compilation takes somewhat more time, and a lot
more memory for a large function.
.Sp
With \fB\-O\fR, the compiler tries to reduce code size and execution
time, without performing any optimizations that take a great deal of
compilation time.
.Sp
\&\fB\-O\fR turns on the following optimization flags:
.Sp
\&\fB\-fauto\-inc\-dec 
\&\-fcprop\-registers 
\&\-fdce 
\&\-fdefer\-pop 
\&\-fdelayed\-branch 
\&\-fdse 
\&\-fguess\-branch\-probability 
\&\-fif\-conversion2 
\&\-fif\-conversion 
\&\-finline\-small\-functions 
\&\-fipa\-pure\-const 
\&\-fipa\-reference 
\&\-fmerge\-constants
\&\-fsplit\-wide\-types 
\&\-ftree\-ccp 
\&\-ftree\-ch 
\&\-ftree\-copyrename 
\&\-ftree\-dce 
\&\-ftree\-dominator\-opts 
\&\-ftree\-dse 
\&\-ftree\-fre 
\&\-ftree\-sra 
\&\-ftree\-ter 
\&\-funit\-at\-a\-time\fR
.Sp
\&\fB\-O\fR also turns on \fB\-fomit\-frame\-pointer\fR on machines
where doing so does not interfere with debugging.
.IP "\fB\-O2\fR" 4
.IX Item "-O2"
Optimize even more.  \s-1GCC\s0 performs nearly all supported optimizations
that do not involve a space-speed tradeoff.  The compiler does not
perform loop unrolling or function inlining when you specify \fB\-O2\fR.
As compared to \fB\-O\fR, this option increases both compilation time
and the performance of the generated code.
.Sp
\&\fB\-O2\fR turns on all optimization flags specified by \fB\-O\fR.  It
also turns on the following optimization flags:
\&\fB\-fthread\-jumps 
\&\-falign\-functions  \-falign\-jumps 
\&\-falign\-loops  \-falign\-labels 
\&\-fcaller\-saves 
\&\-fcrossjumping 
\&\-fcse\-follow\-jumps  \-fcse\-skip\-blocks 
\&\-fdelete\-null\-pointer\-checks 
\&\-fexpensive\-optimizations 
\&\-fgcse  \-fgcse\-lm  
\&\-foptimize\-sibling\-calls 
\&\-fpeephole2 
\&\-fregmove 
\&\-freorder\-blocks  \-freorder\-functions 
\&\-frerun\-cse\-after\-loop  
\&\-fsched\-interblock  \-fsched\-spec 
\&\-fschedule\-insns  \-fschedule\-insns2 
\&\-fstrict\-aliasing \-fstrict\-overflow 
\&\-ftree\-pre 
\&\-ftree\-vrp\fR
.Sp
Please note the warning under \fB\-fgcse\fR about
invoking \fB\-O2\fR on programs that use computed gotos.
.IP "\fB\-O3\fR" 4
.IX Item "-O3"
Optimize yet more.  \fB\-O3\fR turns on all optimizations specified by
\&\fB\-O2\fR and also turns on the \fB\-finline\-functions\fR,
\&\fB\-funswitch\-loops\fR, \fB\-fpredictive\-commoning\fR,
\&\fB\-fgcse\-after\-reload\fR and \fB\-ftree\-vectorize\fR
options.
.IP "\fB\-O0\fR" 4
.IX Item "-O0"
Reduce compilation time and make debugging produce the expected
results.  This is the default.
.IP "\fB\-Os\fR" 4
.IX Item "-Os"
Optimize for size.  \fB\-Os\fR enables all \fB\-O2\fR optimizations that
do not typically increase code size.  It also performs further
optimizations designed to reduce code size.
.Sp
\&\fB\-Os\fR disables the following optimization flags:
\&\fB\-falign\-functions  \-falign\-jumps  \-falign\-loops 
\&\-falign\-labels  \-freorder\-blocks  \-freorder\-blocks\-and\-partition 
\&\-fprefetch\-loop\-arrays  \-ftree\-vect\-loop\-version\fR
.Sp
If you use multiple \fB\-O\fR options, with or without level numbers,
the last such option is the one that is effective.
.PP
Options of the form \fB\-f\fR\fIflag\fR specify machine-independent
flags.  Most flags have both positive and negative forms; the negative
form of \fB\-ffoo\fR would be \fB\-fno\-foo\fR.  In the table
below, only one of the forms is listed\-\-\-the one you typically will
use.  You can figure out the other form by either removing \fBno\-\fR
or adding it.
.PP
The following options control specific optimizations.  They are either
activated by \fB\-O\fR options or are related to ones that are.  You
can use the following flags in the rare cases when \*(L"fine-tuning\*(R" of
optimizations to be performed is desired.
.IP "\fB\-fno\-default\-inline\fR" 4
.IX Item "-fno-default-inline"
Do not make member functions inline by default merely because they are
defined inside the class scope (\*(C+ only).  Otherwise, when you specify
\&\fB\-O\fR, member functions defined inside class scope are compiled
inline by default; i.e., you don't need to add \fBinline\fR in front of
the member function name.
.IP "\fB\-fno\-defer\-pop\fR" 4
.IX Item "-fno-defer-pop"
Always pop the arguments to each function call as soon as that function
returns.  For machines which must pop arguments after a function call,
the compiler normally lets arguments accumulate on the stack for several
function calls and pops them all at once.
.Sp
Disabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
.IP "\fB\-fforward\-propagate\fR" 4
.IX Item "-fforward-propagate"
Perform a forward propagation pass on \s-1RTL\s0.  The pass tries to combine two
instructions and checks if the result can be simplified.  If loop unrolling
is active, two passes are performed and the second is scheduled after
loop unrolling.
.Sp
This option is enabled by default at optimization levels \fB\-O2\fR,
\&\fB\-O3\fR, \fB\-Os\fR.
.IP "\fB\-fomit\-frame\-pointer\fR" 4
.IX Item "-fomit-frame-pointer"
Don't keep the frame pointer in a register for functions that
don't need one.  This avoids the instructions to save, set up and
restore frame pointers; it also makes an extra register available
in many functions.  \fBIt also makes debugging impossible on
some machines.\fR
.Sp
On some machines, such as the \s-1VAX\s0, this flag has no effect, because
the standard calling sequence automatically handles the frame pointer
and nothing is saved by pretending it doesn't exist.  The
machine-description macro \f(CW\*(C`FRAME_POINTER_REQUIRED\*(C'\fR controls
whether a target machine supports this flag.
.Sp
Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
.IP "\fB\-foptimize\-sibling\-calls\fR" 4
.IX Item "-foptimize-sibling-calls"
Optimize sibling and tail recursive calls.
.Sp
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
.IP "\fB\-fno\-inline\fR" 4
.IX Item "-fno-inline"
Don't pay attention to the \f(CW\*(C`inline\*(C'\fR keyword.  Normally this option
is used to keep the compiler from expanding any functions inline.
Note that if you are not optimizing, no functions can be expanded inline.
.IP "\fB\-finline\-small\-functions\fR" 4
.IX Item "-finline-small-functions"
Integrate functions into their callers when their body is smaller than expected
function call code (so overall size of program gets smaller).  The compiler
heuristically decides which functions are simple enough to be worth integrating
in this way.
.Sp
Enabled at level \fB\-O2\fR.
.IP "\fB\-finline\-functions\fR" 4
.IX Item "-finline-functions"
Integrate all simple functions into their callers.  The compiler
heuristically decides which functions are simple enough to be worth
integrating in this way.
.Sp
If all calls to a given function are integrated, and the function is
declared \f(CW\*(C`static\*(C'\fR, then the function is normally not output as
assembler code in its own right.
.Sp
Enabled at level \fB\-O3\fR.
.IP "\fB\-finline\-functions\-called\-once\fR" 4
.IX Item "-finline-functions-called-once"
Consider all \f(CW\*(C`static\*(C'\fR functions called once for inlining into their
caller even if they are not marked \f(CW\*(C`inline\*(C'\fR.  If a call to a given
function is integrated, then the function is not output as assembler code
in its own right.
.Sp
Enabled if \fB\-funit\-at\-a\-time\fR is enabled.
.IP "\fB\-fearly\-inlining\fR" 4
.IX Item "-fearly-inlining"
Inline functions marked by \f(CW\*(C`always_inline\*(C'\fR and functions whose body seems
smaller than the function call overhead early before doing
\&\fB\-fprofile\-generate\fR instrumentation and real inlining pass.  Doing so
makes profiling significantly cheaper and usually inlining faster on programs
having large chains of nested wrapper functions.
.Sp
Enabled by default.
.IP "\fB\-finline\-limit=\fR\fIn\fR" 4
.IX Item "-finline-limit=n"
By default, \s-1GCC\s0 limits the size of functions that can be inlined.  This flag
allows coarse control of this limit.  \fIn\fR is the size of functions that
can be inlined in number of pseudo instructions.
.Sp
Inlining is actually controlled by a number of parameters, which may be
specified individually by using \fB\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR.
The \fB\-finline\-limit=\fR\fIn\fR option sets some of these parameters
as follows:
.RS 4
.IP "\fBmax-inline-insns-single\fR" 4
.IX Item "max-inline-insns-single"
.Vb 1
\& is set to I<n>/2.
.Ve
.IP "\fBmax-inline-insns-auto\fR" 4
.IX Item "max-inline-insns-auto"
.Vb 1
\& is set to I<n>/2.
.Ve
.RE
.RS 4
.Sp
See below for a documentation of the individual
parameters controlling inlining and for the defaults of these parameters.
.Sp
\&\fINote:\fR there may be no value to \fB\-finline\-limit\fR that results
in default behavior.
.Sp
\&\fINote:\fR pseudo instruction represents, in this particular context, an
abstract measurement of function's size.  In no way does it represent a count
of assembly instructions and as such its exact meaning might change from one
release to an another.
.RE
.IP "\fB\-fkeep\-inline\-functions\fR" 4
.IX Item "-fkeep-inline-functions"
In C, emit \f(CW\*(C`static\*(C'\fR functions that are declared \f(CW\*(C`inline\*(C'\fR
into the object file, even if the function has been inlined into all
of its callers.  This switch does not affect functions using the
\&\f(CW\*(C`extern inline\*(C'\fR extension in \s-1GNU\s0 C89.  In \*(C+, emit any and all
inline functions into the object file.
.IP "\fB\-fkeep\-static\-consts\fR" 4
.IX Item "-fkeep-static-consts"
Emit variables declared \f(CW\*(C`static const\*(C'\fR when optimization isn't turned
on, even if the variables aren't referenced.
.Sp
\&\s-1GCC\s0 enables this option by default.  If you want to force the compiler to
check if the variable was referenced, regardless of whether or not
optimization is turned on, use the \fB\-fno\-keep\-static\-consts\fR option.
.IP "\fB\-fmerge\-constants\fR" 4
.IX Item "-fmerge-constants"
Attempt to merge identical constants (string constants and floating point
constants) across compilation units.
.Sp
This option is the default for optimized compilation if the assembler and
linker support it.  Use \fB\-fno\-merge\-constants\fR to inhibit this
behavior.
.Sp
Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
.IP "\fB\-fmerge\-all\-constants\fR" 4
.IX Item "-fmerge-all-constants"
Attempt to merge identical constants and identical variables.
.Sp
This option implies \fB\-fmerge\-constants\fR.  In addition to
\&\fB\-fmerge\-constants\fR this considers e.g. even constant initialized
arrays or initialized constant variables with integral or floating point
types.  Languages like C or \*(C+ require each variable, including multiple
instances of the same variable in recursive calls, to have distinct locations,
so using this option will result in non-conforming
behavior.
.IP "\fB\-fmodulo\-sched\fR" 4
.IX Item "-fmodulo-sched"
Perform swing modulo scheduling immediately before the first scheduling
pass.  This pass looks at innermost loops and reorders their
instructions by overlapping different iterations.
.IP "\fB\-fmodulo\-sched\-allow\-regmoves\fR" 4
.IX Item "-fmodulo-sched-allow-regmoves"
Perform more aggressive \s-1SMS\s0 based modulo scheduling with register moves
allowed.  By setting this flag certain anti-dependences edges will be
deleted which will trigger the generation of reg-moves based on the
life-range analysis.  This option is effective only with
\&\fB\-fmodulo\-sched\fR enabled.
.IP "\fB\-fno\-branch\-count\-reg\fR" 4
.IX Item "-fno-branch-count-reg"
Do not use \*(L"decrement and branch\*(R" instructions on a count register,
but instead generate a sequence of instructions that decrement a
register, compare it against zero, then branch based upon the result.
This option is only meaningful on architectures that support such
instructions, which include x86, PowerPC, \s-1IA\-64\s0 and S/390.
.Sp
The default is \fB\-fbranch\-count\-reg\fR.
.IP "\fB\-fno\-function\-cse\fR" 4
.IX Item "-fno-function-cse"
Do not put function addresses in registers; make each instruction that
calls a constant function contain the function's address explicitly.
.Sp
This option results in less efficient code, but some strange hacks
that alter the assembler output may be confused by the optimizations
performed when this option is not used.
.Sp
The default is \fB\-ffunction\-cse\fR
.IP "\fB\-fno\-zero\-initialized\-in\-bss\fR" 4
.IX Item "-fno-zero-initialized-in-bss"
If the target supports a \s-1BSS\s0 section, \s-1GCC\s0 by default puts variables that
are initialized to zero into \s-1BSS\s0.  This can save space in the resulting
code.
.Sp
This option turns off this behavior because some programs explicitly
rely on variables going to the data section.  E.g., so that the
resulting executable can find the beginning of that section and/or make
assumptions based on that.
.Sp
The default is \fB\-fzero\-initialized\-in\-bss\fR.
.IP "\fB\-fmudflap \-fmudflapth \-fmudflapir\fR" 4
.IX Item "-fmudflap -fmudflapth -fmudflapir"
For front-ends that support it (C and \*(C+), instrument all risky
pointer/array dereferencing operations, some standard library
string/heap functions, and some other associated constructs with
range/validity tests.  Modules so instrumented should be immune to
buffer overflows, invalid heap use, and some other classes of C/\*(C+
programming errors.  The instrumentation relies on a separate runtime
library (\fIlibmudflap\fR), which will be linked into a program if
\&\fB\-fmudflap\fR is given at link time.  Run-time behavior of the
instrumented program is controlled by the \fB\s-1MUDFLAP_OPTIONS\s0\fR
environment variable.  See \f(CW\*(C`env MUDFLAP_OPTIONS=\-help a.out\*(C'\fR
for its options.
.Sp
Use \fB\-fmudflapth\fR instead of \fB\-fmudflap\fR to compile and to
link if your program is multi-threaded.  Use \fB\-fmudflapir\fR, in
addition to \fB\-fmudflap\fR or \fB\-fmudflapth\fR, if
instrumentation should ignore pointer reads.  This produces less
instrumentation (and therefore faster execution) and still provides
some protection against outright memory corrupting writes, but allows
erroneously read data to propagate within a program.
.IP "\fB\-fthread\-jumps\fR" 4
.IX Item "-fthread-jumps"
Perform optimizations where we check to see if a jump branches to a
location where another comparison subsumed by the first is found.  If
so, the first branch is redirected to either the destination of the
second branch or a point immediately following it, depending on whether
the condition is known to be true or false.
.Sp
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
.IP "\fB\-fsplit\-wide\-types\fR" 4
.IX Item "-fsplit-wide-types"
When using a type that occupies multiple registers, such as \f(CW\*(C`long
long\*(C'\fR on a 32\-bit system, split the registers apart and allocate them
independently.  This normally generates better code for those types,
but may make debugging more difficult.
.Sp
Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR,
\&\fB\-Os\fR.
.IP "\fB\-fcse\-follow\-jumps\fR" 4
.IX Item "-fcse-follow-jumps"
In common subexpression elimination (\s-1CSE\s0), scan through jump instructions
when the target of the jump is not reached by any other path.  For
example, when \s-1CSE\s0 encounters an \f(CW\*(C`if\*(C'\fR statement with an
\&\f(CW\*(C`else\*(C'\fR clause, \s-1CSE\s0 will follow the jump when the condition
tested is false.
.Sp
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
.IP "\fB\-fcse\-skip\-blocks\fR" 4
.IX Item "-fcse-skip-blocks"
This is similar to \fB\-fcse\-follow\-jumps\fR, but causes \s-1CSE\s0 to
follow jumps which conditionally skip over blocks.  When \s-1CSE\s0
encounters a simple \f(CW\*(C`if\*(C'\fR statement with no else clause,
\&\fB\-fcse\-skip\-blocks\fR causes \s-1CSE\s0 to follow the jump around the
body of the \f(CW\*(C`if\*(C'\fR.
.Sp
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
.IP "\fB\-frerun\-cse\-after\-loop\fR" 4
.IX Item "-frerun-cse-after-loop"
Re-run common subexpression elimination after loop optimizations has been
performed.
.Sp
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
.IP "\fB\-fgcse\fR" 4
.IX Item "-fgcse"
Perform a global common subexpression elimination pass.
This pass also performs global constant and copy propagation.
.Sp
\&\fINote:\fR When compiling a program using computed gotos, a \s-1GCC\s0
extension, you may get better runtime performance if you disable
the global common subexpression elimination pass by adding
\&\fB\-fno\-gcse\fR to the command line.
.Sp
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
.IP "\fB\-fgcse\-lm\fR" 4
.IX Item "-fgcse-lm"
When \fB\-fgcse\-lm\fR is enabled, global common subexpression elimination will
attempt to move loads which are only killed by stores into themselves.  This
allows a loop containing a load/store sequence to be changed to a load outside
the loop, and a copy/store within the loop.
.Sp
Enabled by default when gcse is enabled.
.IP "\fB\-fgcse\-sm\fR" 4
.IX Item "-fgcse-sm"
When \fB\-fgcse\-sm\fR is enabled, a store motion pass is run after
global common subexpression elimination.  This pass will attempt to move
stores out of loops.  When used in conjunction with \fB\-fgcse\-lm\fR,
loops containing a load/store sequence can be changed to a load before
the loop and a store after the loop.
.Sp
Not enabled at any optimization level.
.IP "\fB\-fgcse\-las\fR" 4
.IX Item "-fgcse-las"
When \fB\-fgcse\-las\fR is enabled, the global common subexpression
elimination pass eliminates redundant loads that come after stores to the
same memory location (both partial and full redundancies).
.Sp
Not enabled at any optimization level.
.IP "\fB\-fgcse\-after\-reload\fR" 4
.IX Item "-fgcse-after-reload"
When \fB\-fgcse\-after\-reload\fR is enabled, a redundant load elimination
pass is performed after reload.  The purpose of this pass is to cleanup
redundant spilling.
.IP "\fB\-funsafe\-loop\-optimizations\fR" 4
.IX Item "-funsafe-loop-optimizations"
If given, the loop optimizer will assume that loop indices do not
overflow, and that the loops with nontrivial exit condition are not
infinite.  This enables a wider range of loop optimizations even if
the loop optimizer itself cannot prove that these assumptions are valid.
Using \fB\-Wunsafe\-loop\-optimizations\fR, the compiler will warn you
if it finds this kind of loop.
.IP "\fB\-fcrossjumping\fR" 4
.IX Item "-fcrossjumping"
Perform cross-jumping transformation.  This transformation unifies equivalent code and save code size.  The
resulting code may or may not perform better than without cross-jumping.
.Sp
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
.IP "\fB\-fauto\-inc\-dec\fR" 4
.IX Item "-fauto-inc-dec"
Combine increments or decrements of addresses with memory accesses.
This pass is always skipped on architectures that do not have
instructions to support this.  Enabled by default at \fB\-O\fR and
higher on architectures that support this.
.IP "\fB\-fdce\fR" 4
.IX Item "-fdce"
Perform dead code elimination (\s-1DCE\s0) on \s-1RTL\s0.
Enabled by default at \fB\-O\fR and higher.
.IP "\fB\-fdse\fR" 4
.IX Item "-fdse"
Perform dead store elimination (\s-1DSE\s0) on \s-1RTL\s0.
Enabled by default at \fB\-O\fR and higher.
.IP "\fB\-fif\-conversion\fR" 4
.IX Item "-fif-conversion"
Attempt to transform conditional jumps into branch-less equivalents.  This
include use of conditional moves, min, max, set flags and abs instructions, and
some tricks doable by standard arithmetics.  The use of conditional execution
on chips where it is available is controlled by \f(CW\*(C`if\-conversion2\*(C'\fR.
.Sp
Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
.IP "\fB\-fif\-conversion2\fR" 4
.IX Item "-fif-conversion2"
Use conditional execution (where available) to transform conditional jumps into
branch-less equivalents.
.Sp
Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
.IP "\fB\-fdelete\-null\-pointer\-checks\fR" 4
.IX Item "-fdelete-null-pointer-checks"
Use global dataflow analysis to identify and eliminate useless checks
for null pointers.  The compiler assumes that dereferencing a null
pointer would have halted the program.  If a pointer is checked after
it has already been dereferenced, it cannot be null.
.Sp
In some environments, this assumption is not true, and programs can
safely dereference null pointers.  Use
\&\fB\-fno\-delete\-null\-pointer\-checks\fR to disable this optimization
for programs which depend on that behavior.
.Sp
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
.IP "\fB\-fexpensive\-optimizations\fR" 4
.IX Item "-fexpensive-optimizations"
Perform a number of minor optimizations that are relatively expensive.
.Sp
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
.IP "\fB\-foptimize\-register\-move\fR" 4
.IX Item "-foptimize-register-move"
.PD 0
.IP "\fB\-fregmove\fR" 4
.IX Item "-fregmove"
.PD
Attempt to reassign register numbers in move instructions and as
operands of other simple instructions in order to maximize the amount of
register tying.  This is especially helpful on machines with two-operand
instructions.
.Sp
Note \fB\-fregmove\fR and \fB\-foptimize\-register\-move\fR are the same
optimization.
.Sp
Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
.IP "\fB\-fdelayed\-branch\fR" 4
.IX Item "-fdelayed-branch"
If supported for the target machine, attempt to reorder instructions
to exploit instruction slots available after delayed branch
instructions.
.Sp
Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-O